ADXL362_FIFODATE_1st_sample

Hello

My customer have some questions about ADXL362. Please tell me.

Register settings are following.

addres 0x1F  code 0x52.

addres 0x2D  code 0x00.

addres 0x20  code 0x7D.

addres 0x21  code 0x00.

addres 0x22  code 0x01.

addres 0x23  code 0x7D.

addres 0x24  code 0x00.

addres 0x25  code 0x01.

addres 0x26  code 0x00.

addres 0x27  code 0x3F.

addres 0x28  code 0x03.

addres 0x29  code 0x9C.

addres 0x2A code 0x01.

addres 0x2B code 0x10.

addres 0x2C code 0x91.

addres 0x2D code 0x02.

When vibration occurs before becoming FIFO DATE FULL in this state.

1st sample   : 0x800 or similar to maximum value.

When after having become FIFO DATE FULL in this state, vibration occurs.

1st sample   : normal date.

Is this a device specification? Please tell me the cause and workaround.

It seems to be the same content as EZ below.

https://ez.analog.com/mems/f/q-a/86305/adxl362-fifo

thank you.

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