I have the ADF7030-1 dev kit and I'm trying to get it to work with the Pocsag paging protocol. This protocol requires 2FSK at a data rate of 512 baud. The ADF7030-1 design center software and the data rate register appear to only allow data rates in steps of 100 bps. Unfortunately the NRZ nature of the data means there can be long periods without transitions, so the data rate must be accurate. At 500bps the timing will drift by half a bit in only 21 bits.
There are many registers that are not covered by the the S/W ref manual and datasheet. Perhaps some of these registers can be reconfigured to allow a baud rate of 512 baud?
Where may I find further information on the various register settings?
Hi Rob!It is recommended to stay within the design center values. If a finer resolution is required for your application, please feel free to contact your local ADI FAE.Thanks and regards,Allan