ADF7021 Tx/Rx SPI details

Hi!

I am currently working on a university project and I need to interface an STM32 microcontroller via SPI with ADF7021 RF-transceiver. I am reading a datasheet for ADF
and I have trouble understanding some details regarding Tx/Rx and SPI.

https://www.analog.com/en/products/adf7021.html

1) When does ADF transmitter start clocking in the data (after I initialise what register)? When does ADF start transmitting (after I initialise what register)?

2) When do I stop ADF transmitter (after latency bits)?

It is said that I need to wait a number of latency bits before disabling ADF transmitter. How would STM32 know when these latency bits have passed?

3) When does ADF receiver start clocking out the data?

Does ADF receiver clock out the preamble and sync word? In the datasheet it is said that AGC, AFC and CDR need to settle during preamble. Does that mean that ADF receiver starts clocking out the data in the middle of preamble (for example beginning with 3rd bit)? How would STM32 process and later access this data, if it has an 8-bit SPI data register?

4) When does ADF receiver stop clocking out the data?

What happens after the transmission ends and ADF receives a packet of data? Does ADF still provide the clock on CLKOUT?

Thank you! I hope it's not too confusing.



.
[edited by: Allfather at 12:02 PM (GMT -4) on 7 Apr 2021]
Parents
  • +1
    •  Analog Employees 
    on Apr 20, 2021 8:18 AM

    Hi Allfather,

    Please see my answers below

    1) When does ADF transmitter start clocking in the data (after I initialise what register)? When does ADF start transmitting (after I initialise what register)?

    You may refer to Figure 54 in the data sheet for the proper sequence of programming registers.The ADF7023 starts clocking out data after turning the PA on (writing to register 2)

    2) When do I stop ADF transmitter (after latency bits)? It is said that I need to wait a number of latency bits before disabling ADF transmitter. How would STM32 know when these latency bits have passed?

    You would have to take consideration on the modulation scheme, number of bits to be transmitted, latency bits(table 12) and the data rate to determine the time needed by the ADF7021 to complete transmission.

    3) When does ADF receiver start clocking out the data?

    Does ADF receiver clock out the preamble and sync word? In the datasheet it is said that AGC, AFC and CDR need to settle during preamble. Does that mean that ADF receiver starts clocking out the data in the middle of preamble (for example beginning with 3rd bit)? How would STM32 process and later access this data, if it has an 8-bit SPI data register?

    You may refer to figure 55 of the datasheet. The ADF7021 clocks out all received data in "Rx Mode" after programming the necessary registers (register 4, register 10 if AFC enabled). You'd have to develop a way to store the data and do all the processing of data in the microcontroller.

    4) When does ADF receiver stop clocking out the data? What happens after the transmission ends and ADF receives a packet of data? Does ADF still provide the clock on CLKOUT?

    The ADF7021 does not have packet processing and will continue clocking data until the CE pin is brought low.

Reply
  • +1
    •  Analog Employees 
    on Apr 20, 2021 8:18 AM

    Hi Allfather,

    Please see my answers below

    1) When does ADF transmitter start clocking in the data (after I initialise what register)? When does ADF start transmitting (after I initialise what register)?

    You may refer to Figure 54 in the data sheet for the proper sequence of programming registers.The ADF7023 starts clocking out data after turning the PA on (writing to register 2)

    2) When do I stop ADF transmitter (after latency bits)? It is said that I need to wait a number of latency bits before disabling ADF transmitter. How would STM32 know when these latency bits have passed?

    You would have to take consideration on the modulation scheme, number of bits to be transmitted, latency bits(table 12) and the data rate to determine the time needed by the ADF7021 to complete transmission.

    3) When does ADF receiver start clocking out the data?

    Does ADF receiver clock out the preamble and sync word? In the datasheet it is said that AGC, AFC and CDR need to settle during preamble. Does that mean that ADF receiver starts clocking out the data in the middle of preamble (for example beginning with 3rd bit)? How would STM32 process and later access this data, if it has an 8-bit SPI data register?

    You may refer to figure 55 of the datasheet. The ADF7021 clocks out all received data in "Rx Mode" after programming the necessary registers (register 4, register 10 if AFC enabled). You'd have to develop a way to store the data and do all the processing of data in the microcontroller.

    4) When does ADF receiver stop clocking out the data? What happens after the transmission ends and ADF receives a packet of data? Does ADF still provide the clock on CLKOUT?

    The ADF7021 does not have packet processing and will continue clocking data until the CE pin is brought low.

Children
  • 0
    •  Analog Employees 
    on Apr 20, 2021 8:19 AM in reply to afuertes

    Hi Allfather,

    Please see my answers below

    1) When does ADF transmitter start clocking in the data (after I initialise what register)? When does ADF start transmitting (after I initialise what register)?

    You may refer to Figure 54 in the data sheet for the proper sequence of programming registers.The ADF7023 starts clocking out data after turning the PA on (writing to register 2)

    2) When do I stop ADF transmitter (after latency bits)? It is said that I need to wait a number of latency bits before disabling ADF transmitter. How would STM32 know when these latency bits have passed?

    You would have to take consideration on the modulation scheme, number of bits to be transmitted, latency bits(table 12) and the data rate to determine the time needed by the ADF7021 to complete transmission.

    3) When does ADF receiver start clocking out the data?

    Does ADF receiver clock out the preamble and sync word? In the datasheet it is said that AGC, AFC and CDR need to settle during preamble. Does that mean that ADF receiver starts clocking out the data in the middle of preamble (for example beginning with 3rd bit)? How would STM32 process and later access this data, if it has an 8-bit SPI data register?

    You may refer to figure 55 of the datasheet. The ADF7021 clocks out all received data in "Rx Mode" after programming the necessary registers (register 4, register 10 if AFC enabled). You'd have to develop a way to store the data and do all the processing of data in the microcontroller.

    4) When does ADF receiver stop clocking out the data? What happens after the transmission ends and ADF receives a packet of data? Does ADF still provide the clock on CLKOUT?

    The ADF7021 does not have packet processing and will continue clocking out data until the CE pin is brought low.