ADF7021 Tx/Rx SPI details

Hi!

I am currently working on a university project and I need to interface an STM32 microcontroller via SPI with ADF7021 RF-transceiver. I am reading a datasheet for ADF
and I have trouble understanding some details regarding Tx/Rx and SPI.

https://www.analog.com/en/products/adf7021.html

1) When does ADF transmitter start clocking in the data (after I initialise what register)? When does ADF start transmitting (after I initialise what register)?

2) When do I stop ADF transmitter (after latency bits)?

It is said that I need to wait a number of latency bits before disabling ADF transmitter. How would STM32 know when these latency bits have passed?

3) When does ADF receiver start clocking out the data?

Does ADF receiver clock out the preamble and sync word? In the datasheet it is said that AGC, AFC and CDR need to settle during preamble. Does that mean that ADF receiver starts clocking out the data in the middle of preamble (for example beginning with 3rd bit)? How would STM32 process and later access this data, if it has an 8-bit SPI data register?

4) When does ADF receiver stop clocking out the data?

What happens after the transmission ends and ADF receives a packet of data? Does ADF still provide the clock on CLKOUT?

Thank you! I hope it's not too confusing.



.
[edited by: Allfather at 12:02 PM (GMT -4) on 7 Apr 2021]
  • Hi Allfather,

    Thanks for the help from before! I haven't actually gotten around to doing Tx/Rx on the ADF7021 transceiver since I'm currently just working with the microcontroller and the purpose of the microcontroller in my setup is to program the registers and other configuration related things. But, I can try and answer your questions from what I know/guess at least.

    1. There's a flow chart (as well as a regular chart) in the Revision D data sheet that talks about setting up the Tx/Rx modes detailing which registers to set up and in what order on pages 41,42, and 43. My best bet would be to follow this, so Register 2 for Tx and Register 4 for Rx. Secretly, I think it's whenever you set Tx or Rx mode on Register 0 but without setting up Register 2 or Register 4, your Tx/Rx mode won't be very useful. Without the power amping from Register 2, you probably don't have enough transmit power for a good signal, and without the demodulation from Register 4, you probably won't be receiving any useful info from a modulated carrier wave.

    2. I don't think the STM32 itself will know when exactly the latency bits have passed, but there's a transmit latency chart you can refer to in the Transmit Latency section. If you know your modulation scheme and your baud rate, you can write a delay function for your STM32 to account for the latency before disabling the ADF7021. If you don't need to deal with precise timing, you can just write a general delay function that works for all modulation schemes and baud rates by delaying a longer time period, say a second or longer if necessary (could be shorter too, as long as it works).

    3. Looking at Figure 53, my guess would be that the preamble and sync word are clocked out as they are included in the transmit packet structure. It also makes sense that the sync word is clocked out since the sync word is generally used to show that the preamble has ended and that the next bits are the actual data payload. If you've got 2 ADF7021s, you could try sending a message from one to the other, and store the bits on the microcontroller for you to look at and verify if the sync word and preamble are clocked out. For the last question, what you could maybe do is use the SPI receive interrupt and use it to receive and store the data somewhere so you can process it after receiving your data packet. Keep the interrupt function short so you don't miss out on data and just continuously store the data byte by byte.

    4. I don't really understand your question. Doesn't the transceiver stop clocking out the data when the transmit packet is fully sent? Or are you asking if the clock is still provided? For the second question, I imagine you won't properly receive the packet of data after a transmission if you don't change from Tx to Rx. For the last question, best bet for your clock questions would be to take a look at CKLOUT on an oscilloscope.

    I'll let you know more if I learn anything more. Hope this is a little helpful.

  • Thank you very much for taking a look at my questions! I'll keep your answers in mind while working further.

  • +1
    •  Analog Employees 
    on Apr 20, 2021 8:18 AM

    Hi Allfather,

    Please see my answers below

    1) When does ADF transmitter start clocking in the data (after I initialise what register)? When does ADF start transmitting (after I initialise what register)?

    You may refer to Figure 54 in the data sheet for the proper sequence of programming registers.The ADF7023 starts clocking out data after turning the PA on (writing to register 2)

    2) When do I stop ADF transmitter (after latency bits)? It is said that I need to wait a number of latency bits before disabling ADF transmitter. How would STM32 know when these latency bits have passed?

    You would have to take consideration on the modulation scheme, number of bits to be transmitted, latency bits(table 12) and the data rate to determine the time needed by the ADF7021 to complete transmission.

    3) When does ADF receiver start clocking out the data?

    Does ADF receiver clock out the preamble and sync word? In the datasheet it is said that AGC, AFC and CDR need to settle during preamble. Does that mean that ADF receiver starts clocking out the data in the middle of preamble (for example beginning with 3rd bit)? How would STM32 process and later access this data, if it has an 8-bit SPI data register?

    You may refer to figure 55 of the datasheet. The ADF7021 clocks out all received data in "Rx Mode" after programming the necessary registers (register 4, register 10 if AFC enabled). You'd have to develop a way to store the data and do all the processing of data in the microcontroller.

    4) When does ADF receiver stop clocking out the data? What happens after the transmission ends and ADF receives a packet of data? Does ADF still provide the clock on CLKOUT?

    The ADF7021 does not have packet processing and will continue clocking data until the CE pin is brought low.

  • 0
    •  Analog Employees 
    on Apr 20, 2021 8:19 AM in reply to afuertes

    Hi Allfather,

    Please see my answers below

    1) When does ADF transmitter start clocking in the data (after I initialise what register)? When does ADF start transmitting (after I initialise what register)?

    You may refer to Figure 54 in the data sheet for the proper sequence of programming registers.The ADF7023 starts clocking out data after turning the PA on (writing to register 2)

    2) When do I stop ADF transmitter (after latency bits)? It is said that I need to wait a number of latency bits before disabling ADF transmitter. How would STM32 know when these latency bits have passed?

    You would have to take consideration on the modulation scheme, number of bits to be transmitted, latency bits(table 12) and the data rate to determine the time needed by the ADF7021 to complete transmission.

    3) When does ADF receiver start clocking out the data?

    Does ADF receiver clock out the preamble and sync word? In the datasheet it is said that AGC, AFC and CDR need to settle during preamble. Does that mean that ADF receiver starts clocking out the data in the middle of preamble (for example beginning with 3rd bit)? How would STM32 process and later access this data, if it has an 8-bit SPI data register?

    You may refer to figure 55 of the datasheet. The ADF7021 clocks out all received data in "Rx Mode" after programming the necessary registers (register 4, register 10 if AFC enabled). You'd have to develop a way to store the data and do all the processing of data in the microcontroller.

    4) When does ADF receiver stop clocking out the data? What happens after the transmission ends and ADF receives a packet of data? Does ADF still provide the clock on CLKOUT?

    The ADF7021 does not have packet processing and will continue clocking out data until the CE pin is brought low.