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Soft bricking ADF7024 after writing CMD_HW_RESET command or using radio profile 'F'

Chip is operational and stable except for two situations. We're using the eval board. Eval-ADF7024DB1Z (RevA1)

Here I present situation of writing the command CMD_HW_RESET (0xC8, 0xFF, 0xFF) to the ADF7024. This command causes chip to seize up. When we poll SPI_NOP (0xFF) we see the following all applies at the same time:

1) that the chip remains in the state prior to issuing the CMD_HW_RESET command as well as (such that PHY_any > CMD_HW_RESET  issued > stuck in PHY_any state)

2) SPI_READY=True (bit 1) , CMD_READY = False (bit 0)

3) We can continually poll NOP for status (0xFF) and read registers [0x39, 0x00, 0xff] + 64*[0xff] without issue

4) Chip does NOT perform any command actions such as state change, transmission, receiving. We can ONLY read at this point. This was verified with analyzer.

5) Hard power cycle recovers chip into operational state, but we have to rewrite registers.


Next situation involves radio profile 'F.' We were successful in testing radio profiles A,B,C,D, and E with no issues. However when we configure Radio Profile as 'F' in the registers, the above seizing occurs when a Transmission or receiving command is given. No data is transmitted (verified by analyzer). The chip enters the PHY_TX mode and gets stuck. A hard power cycle also fixes this issue (and using different radio profile)

help much appreciated!

  • Hi Apsistech,

    Once CMD_HW_RESET is issued, the ADF7024 enters PHY_SLEEP. The ADF7024 should be initialized before use. Please refer to the INITIALIZATION section page 21 of the Reference Manual UG-698.

    I'm not aware of any issues with Profile F. All profiles have been tested and verified. Can you confirm that state transitions are being followed? You may refer to page 17 of the Reference Manual.