AD9361 DDS Tones and ADI OSC


     While testing the DDS on an FPGA board with two 9361's we notice that sometimes (very rarely), the DDS tones will not turn on when we boot the system. When viewing the settings in the IIO osc we notice one of the DDS Tx's will be in 'Disabled' mode, enabling this channel will result in tones at expected frequencies. To rectify this, we're purposing to write '1' to both chip's DDS 'raw' values to turn on the DDS (only one call per 9361 chip as the driver seems to send the same value to all iio voltages on that chip).

     A new problem occurs if our IIO osc has a default value to have one of the TX's 'Disable' mode for DDS mode, it'll change the value of both 9361 chips to Disabled (writing 1 to raw will work until the OSC has been reloaded, in which case raw will be re-set to 0). However it looks like sometimes 'Disable' simply writes '0' to scale, but not all the time (looks like if you disable the first DDS Tx on a 9361 instead of the second, it just resets the scale value). Is there a way to disable the OSC writing values down to the driver? We use the osc to visually inspect the receive path so this is inconvenient, but not crippling to our development.


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