Xilin DMA with LIBIIO : buffer size only 64KB

Hi,

I think you mean 64K samples and not 64 KiB. Due to the number of bits associated to the DMA addresses (17 bits if I remember correctly), the maximum buffer size is 64K samples. To fetch a 8 MiB buffer, you will have to do it by 64K blocks and refill the iio_buffer until you reach 8 MiB.

Regards,

-Paul

Hi,

I used a xilinx axi_dmac IP bu with a analog writed linux device driver - the driver is in linux_zynq_xcomm branch on the github. I just know little about device driver, but I'm sure that the DMA ip is configured to 23bit address width, but I' not clear that either the driver support max 17bit or 23 bit.

Yes, it's 64K bytes, not samples, I'm very sure about this, this number is got from iio_buffer_refill. 

If I used a analog axi_dmac IP, the buffer can exceed 64KB, maybe 8MB the largest. But I always got a first 32bit

error data in a self-defined packet, and until now, I can't fix this bug! I post several discussions here, but still got no correct answer ------ so, that's why I tried a xilinx axi_dmac with libiio.

fivepanda:

Using the Xilinx AXI DMA with libiio can be done (I've been using it my project for the past 8 months).

First off, you should be clear about which DMA core you're using -- "axi_dmac" is a core developed by ADI.  "AXI DMA" is a core developed by Xilinx.  At a high-level, they do more or less the same thing, but with a different interface in hardware and a different driver in software.

Depending on which version of the xilinx_dma (or xilinx_axidma) driver you're using, your issue could be due to the "xlnx,sg-length-width" attribute not being set correctly in your devicetree.  The version in the ADI tree (drivers/dma/xilinx_dma.c) needs this to be set correctly to the "Width of Buffer Length Register" you'd selected in Vivado.

Newer versions of the driver (from Xilinx's kernel tree) seem to ignore it (which is a bug in my opinion).

Notably, I haven't been able to make driver in the ADI tree work for me (drivers/dma/xilinx_dma.c), and it seems to be unmaintained at the moment.  Although even the drivers in Xilinx's tree are still pretty buggy at the moment (see my pull request on github: AXI DMA Driver bugfixes/improvements by jeremytrimble · Pull Request #76 · Xilinx/linux-xlnx · GitHub).

Anyway, what version of the AXI DMA driver are you using?

Hi, Jtrimble,

I used xilinx AXI DMA(in vivado 2015.3), just in simple mode,

the driver I used is   "drivers/dma/xilinx_dma.c", analog's version, I noticed that

it updated at 2012.

I have tried to use drivers/dma/xilinx/xxx.c , I can't clearly remember the name, I just

remember the attribute is "compatible = xlnx, axi_dma 1.0a". but using this driver,

the boot process will not find the IIO device the dma channel attached to.

I find a discussion about the xilinx axi_dma sg-mode on the ez, that discussion says

the adi xilinx_dma.c driver support sg-mode, but no API for it. I also have tried the

sg-mode in xilinx axi_dma, maybe my devicetree set is not right, "iio_buffer_refill" can't

receiver any data from the PL.

Can someone give some advices about using xilinx dma with libiio?

Hi,

If there are issues with the Xilinx DMA I'd recommend to connect the Xilinx support.

- Lars

Hi,

There were lots of questions in this thread. What information exactly are you looking for?

- Lars

Hi,

Hm, ok, "no custom code" is maybe a overstatement. Should have been "almost no custom code". The dmaengine helper for IIO is supposed to be called and setup from a driver that represents the hardware the DMA is connected to. E.g. like in linux/cf_axi_adc_ring_stream.c at xcomm_zynq · analogdevicesinc/linux · GitHub.

There is also this kind of generic transparent IIO DMA driver available at GitHub - ekigwana/adi_dmac_iio_client: Client Driver for this HDL module. This might also be helpful for you.

- Lars

Any news here? I am looking for the exact same information