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channels manipulation

Thread Summary

The user asked if it's possible to define a device tree for using TX1 and RX2 or TX1 and RX1/2 with the ADRV9002 on the zcu102 eval board with Linux kernel drivers 2023.2. The final answer indicates that the Tx clock is sourced from the Rx clock, so TX1 can only be used if RX1 is enabled or at the same rate. To use RX2 and TX1, the HDL project needs to be rebuilt with 'make USE_RX_CLK_FOR_TX1=2'. The ADRV9002 IP and TES updates are required for this configuration.
AI Generated Content
Category: Software
Product Number: adrv9002
Software Version: petalinux 2023.2

Hi,

is it possible to define a device tree that use/manipulate two RX channels and one TX channel with respect to linux kernel  drivers version 2023.2? 

to clarify, enabling only TX1 & RX2 or TX1 & RX1/2.

my adrv9002 device tree files based on the meta-adi zynq us+ zcu102 eval board examples.

BR

danya

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