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Problem to bulid petalinux for new XSA

Category: Software
Product Number: ADRV9361z7035 BOB-LVDS
Software Version: 2022.2 branch ADI

HI,

When I build a petalinux project on XSA openwifi according to ADI recommendations, I get an error with building the device tree:


ERROR: device-tree-xilinx-v2022.2+gitAUTOINC+24d29888d0-r0 do_configure: ExecutionError('/dysk/PETA_2022_2/openwifiadrv9361adi/build/tmp/work/zynq_generic-xilinx-linux-gnueabi/device-tree/xilinx-v2022.2+gitAUTOINC+24d29888d0-r0/temp/run.do_configure.2979308', 1, None, None)
ERROR: Logfile of failure stored in: /dysk/PETA_2022_2/openwifiadrv9361adi/build/tmp/work/zynq_generic-xilinx-linux-gnueabi/device-tree/xilinx-v2022.2+gitAUTOINC+24d29888d0-r0/temp/log.do_configure.2979308
Log data follows:
| DEBUG: Executing python function extend_recipe_sysroot
| NOTE: Direct dependencies are ['/dysk/PETA_2022_2/openwifiadrv9361adi/components/yocto/layers/core/meta/recipes-devtools/quilt/quilt-native_0.66.bb:do_populate_sysroot', '/dysk/PETA_2022_2/openwifiadrv9361adi/components/yocto/layers/core/meta/recipes-kernel/kmod/kmod-native_git.bb:do_populate_sysroot', 'virtual:default:/dysk/PETA_2022_2/openwifiadrv9361adi/components/yocto/layers/core/meta/recipes-devtools/python/python3_3.9.9.bb:do_populate_sysroot', '/dysk/PETA_2022_2/openwifiadrv9361adi/components/yocto/layers/core/meta/recipes-kernel/kern-tools/kern-tools-native_git.bb:do_populate_sysroot', 'virtual:default:/dysk/PETA_2022_2/openwifiadrv9361adi/components/yocto/layers/core/meta/recipes-devtools/pseudo/pseudo_git.bb:do_populate_sysroot', 'virtual:default:/dysk/PETA_2022_2/openwifiadrv9361adi/components/yocto/layers/meta-virtualization/recipes-kernel/dtc/python3-dtc_1.6.1.bb:do_populate_sysroot', 'virtual:default:/dysk/PETA_2022_2/openwifiadrv9361adi/components/yocto/layers/core/meta/recipes-devtools/bison/bison_3.7.6.bb:do_populate_sysroot', '/dysk/PETA_2022_2/openwifiadrv9361adi/components/yocto/layers/core/meta/recipes-devtools/gcc/gcc-cross_11.2.bb:do_populate_sysroot', 'virtual:default:/dysk/PETA_2022_2/openwifiadrv9361adi/components/yocto/layers/core/meta/recipes-extended/bc/bc_1.07.1.bb:do_populate_sysroot', '/dysk/PETA_2022_2/openwifiadrv9361adi/components/yocto/layers/core/meta/recipes-devtools/binutils/binutils-cross_2.37.bb:do_populate_sysroot', 'virtual:default:/dysk/PETA_2022_2/openwifiadrv9361adi/components/yocto/layers/core/meta/recipes-extended/xz/xz_5.2.5.bb:do_populate_sysroot', 'virtual:default:/dysk/PETA_2022_2/openwifiadrv9361adi/components/yocto/layers/core/meta/recipes-kernel/dtc/dtc_1.6.1.bb:do_populate_sysroot', 'virtual:default:/dysk/PETA_2022_2/openwifiadrv9361adi/components/yocto/layers/core/meta/recipes-devtools/patch/patch_2.7.6.bb:do_populate_sysroot', 'virtual:default:/dysk/PETA_2022_2/openwifiadrv9361adi/components/yocto/layers/core/meta/recipes-bsp/u-boot/u-boot-tools_2021.07.bb:do_populate_sysroot', 'virtual:default:/dysk/PETA_2022_2/openwifiadrv9361adi/components/yocto/layers/core/meta/recipes-devtools/python/python3-pyyaml_5.4.1.bb:do_populate_sysroot']
| NOTE: Installed into sysroot: ['kmod-default', 'kern-tools-default', 'bison-default', 'gcc-cross-arm', 'bc-default', 'binutils-cross-arm', 'u-boot-tools-default', 'gtk-doc-default', 'libmpc-default', 'gmp-default', 'mpfr-default', 'linux-libc-headers']
| NOTE: Skipping as already exists in sysroot: ['quilt-default', 'python3-default', 'pseudo-default', 'python3-dtc-default', 'xz-default', 'dtc-default', 'patch-default', 'python3-pyyaml-default', 'libffi-default', 'libtirpc-default', 'sqlite3-default', 'gdbm-default', 'openssl-default', 'libtool-default', 'bzip2-default', 'pkgconfig-default', 'zlib-default', 'autoconf-default', 'util-linux-default', 'libnsl2-default', 'readline-default', 'automake-default', 'libyaml-default', 'flex-default', 'swig-default', 'texinfo-dummy-default', 'gnu-config-default', 'python3-cython-default', 'python3-setuptools-default', 'gettext-minimal-default', 'attr-default', 'm4-default', 'util-linux-libuuid-default', 'ncurses-default', 'libpcre2-default', 'libcap-ng-default', 'libpcre-default']
| DEBUG: sed -e 's:^[^/]*/:/dysk/PETA_2022_2/openwifiadrv9361adi/build/tmp/work/zynq_generic-xilinx-linux-gnueabi/device-tree/xilinx-v2022.2+gitAUTOINC+24d29888d0-r0/recipe-sysroot-default/:g' /dysk/PETA_2022_2/openwifiadrv9361adi/build/tmp/sysroots-components/x86_64/bison-default/fixmepath /dysk/PETA_2022_2/openwifiadrv9361adi/build/tmp/sysroots-components/x86_64/gcc-cross-arm/fixmepath /dysk/PETA_2022_2/openwifiadrv9361adi/build/tmp/sysroots-components/x86_64/gtk-doc-default/fixmepath /dysk/PETA_2022_2/openwifiadrv9361adi/build/tmp/sysroots-components/x86_64/gmp-default/fixmepath | xargs sed -i -e 's:FIXMESTAGINGDIRTARGET:/dysk/PETA_2022_2/openwifiadrv9361adi/build/tmp/work/zynq_generic-xilinx-linux-gnueabi/device-tree/xilinx-v2022.2+gitAUTOINC+24d29888d0-r0/recipe-sysroot:g; s:FIXMESTAGINGDIRHOST:/dysk/PETA_2022_2/openwifiadrv9361adi/build/tmp/work/zynq_generic-xilinx-linux-gnueabi/device-tree/xilinx-v2022.2+gitAUTOINC+24d29888d0-r0/recipe-sysroot-default:g' -e 's:FIXME_PSEUDO_SYSROOT:/dysk/PETA_2022_2/openwifiadrv9361adi/build/tmp/sysroots-components/x86_64/pseudo-default:g' -e 's:FIXME_HOSTTOOLS_DIR:/dysk/PETA_2022_2/openwifiadrv9361adi/build/tmp/hosttools:g' -e 's:FIXME_PKGDATA_DIR:/dysk/PETA_2022_2/openwifiadrv9361adi/build/tmp/pkgdata/zynq-generic:g' -e 's:FIXME_PSEUDO_LOCALSTATEDIR:/dysk/PETA_2022_2/openwifiadrv9361adi/build/tmp/work/zynq_generic-xilinx-linux-gnueabi/device-tree/xilinx-v2022.2+gitAUTOINC+24d29888d0-r0/pseudo/:g' -e 's:FIXME_LOGFIFO:/dysk/PETA_2022_2/openwifiadrv9361adi/build/tmp/work/zynq_generic-xilinx-linux-gnueabi/device-tree/xilinx-v2022.2+gitAUTOINC+24d29888d0-r0/temp/fifo.2979308:g'
| DEBUG: Python function extend_recipe_sysroot finished
| DEBUG: Executing shell function do_configure
| ENABLE_OPENAMP_DTSI is not SET (0)
| MISC_ARG is  -hdf_type xsa -yamlconf /dysk/PETA_2022_2/openwifiadrv9361adi/build/tmp/work/zynq_generic-xilinx-linux-gnueabi/device-tree/xilinx-v2022.2+gitAUTOINC+24d29888d0-r0/device-tree.yaml
| APP_ARG is  -app "device-tree"
| Using xsct from: /dysk/usr/tools/Xilinx_2022/PetaLinux/2022.2/tool/tools/xsct//bin/xsct
| cmd is: xsct -sdx -nodisp /dysk/PETA_2022_2/openwifiadrv9361adi/build/tmp/work/zynq_generic-xilinx-linux-gnueabi/device-tree/xilinx-v2022.2+gitAUTOINC+24d29888d0-r0/dtgen.tcl -ws /dysk/PETA_2022_2/openwifiadrv9361adi/project-spec/configs/../../components/plnx_workspace/device-tree -pname device-tree -rp /dysk/PETA_2022_2/openwifiadrv9361adi/build/tmp/work/zynq_generic-xilinx-linux-gnueabi/device-tree/xilinx-v2022.2+gitAUTOINC+24d29888d0-r0/git -processor_ip ps7_cortexa9 -hdf /dysk/PETA_2022_2/openwifiadrv9361adi/build/tmp/deploy/images/zynq-generic/Xilinx-zynq-generic.xsa -arch 32   -app "device-tree"  -hdf_type xsa -yamlconf /dysk/PETA_2022_2/openwifiadrv9361adi/build/tmp/work/zynq_generic-xilinx-linux-gnueabi/device-tree/xilinx-v2022.2+gitAUTOINC+24d29888d0-r0/device-tree.yaml
| WARNING: sdtgen package cannot be loaded. System Device tree commands will not
|
| be available
| INFO: [Hsi 55-2053] elapsed time for repository (/dysk/usr/tools/Xilinx_2022/PetaLinux/2022.2/tool/tools/xsct/data/embeddedsw) loading 0 seconds
| can't read "afi2": no such variable
| ERROR: [Hsi 55-1545] Problem running tcl command ::sw_device_tree::generate : can't read "afi2": no such variable
|     while executing
| "get_cells -hier $afi2"
|     (procedure "add_or_get_bus_node" line 244)
|     invoked from within
| "add_or_get_bus_node $ip $default_dts"
|     (procedure "gen_peripheral_nodes" line 66)
|     invoked from within
| "gen_peripheral_nodes $drv_handle "create_node_only""
|     ("foreach" body line 3)
|     invoked from within
| "foreach drv_handle [get_drivers] {
|         # generate the default properties
|         gen_peripheral_nodes $drv_handle "create_node_only"
|         gen_r..."
|     (procedure "::sw_device_tree::generate" line 3)
|     invoked from within
| "::sw_device_tree::generate device_tree"
| ERROR: [Hsi 55-1442] Error(s) while running TCL procedure generate()
| generate_target failed
|     while executing
| "error "generate_target failed""
|     invoked from within
| "if {[catch {hsi generate_target -dir $project} res]} {
| error "generate_target failed"
| }"
|     (file "/dysk/PETA_2022_2/openwifiadrv9361adi/build/tmp/work/zynq_generic-xilinx-linux-gnueabi/device-tree/xilinx-v2022.2+gitAUTOINC+24d29888d0-r0/dtgen.tcl" line 49)
| WARNING: exit code 1 from a shell command.
ERROR: Task (/dysk/PETA_2022_2/openwifiadrv9361adi/components/yocto/layers/meta-xilinx/meta-xilinx-core/recipes-bsp/device-tree/device-tree.bb:do_configure) failed with exit code '1'
NOTE: Tasks Summary: Attempted 4403 tasks of which 0 didn't need to be rerun and 1 failed.

Summary: 1 task failed:

All tools are 2022.2, including meta-adi. The project is built using Vitis. There's a boot.bin and a kernel from the XSA analog repo, derived from the project https://github.com/open-sdr Higher versions, such as 2023.2, have a similar setup. Build according to the instructions for the specific branch. I can provide XSA and the entire project in VIVADO.

Thread Notes

Parents
  • Hi,

    What .xsa are you building? Also note 2022.2 is already fairly old and not really maintained any longer. Any change to try with a new version or even the main branch?

    - Nuno Sá

  • Subject: Bug Report: ADRV9361-Z7035-BOB build issues in meta-adi and proposed SDT-based fix

    Dear Analog Devices Team,

    I am reporting a persistent issue with the build process for the zynq-adrv9361-z7035-bob branch. Currently, the meta-adi layer builds the system for the Z706 board instead of the ADRV9361-Z7035.

    I have successfully developed a workaround using the official ADI DTSI/DTS files and the kernel repository path: arch/arm/boot/dts/xilinx/zynq-adrv9361-z7035-bob.dts.

    Identified Issues:

    1. DTSI Bugs: I found errors in arch/arm/boot/dts/xilinx/zynq-adrv9361-z7035.dtsi which required manual correction.

    2. Missing DMA Driver: The xilinx-dma driver was disabled in the Kernel, causing interrupt errors. Enabling it resolved the issue, though Ethernet still requires further verification.

    Reproduction and Build Path (PetaLinux 2025.1 with SDT):

    I am using the System Device Tree (SDT) format for better project flexibility:

    1. SDT Generation: sdtgen -eval "set_dt_param -xsa system_top.xsa -dir sdt_outputadrv; generate_sdt"

    2. Project Integration: petalinux-config –get-hw-description=./ sdt_outputadrv

    Project Configuration Files:

    1. /project-spec/meta-user/recipes-bsp/device-tree/device-tree.bbappend

    FILESEXTRAPATHS:prepend := "${THISDIR}/files:" SRC_URI:append = " file://system-user.dtsi \ file://zynq-adrv9361-z7035.dtsi" KERNEL_INCLUDE:append = " \ ${STAGING_KERNEL_DIR}/include" KERNEL_DTB_PATH = "${WORKDIR}" require ${@'device-tree-sdt.inc' if d.getVar('SYSTEM_DTFILE') != '' else ''}

    2. project-spec/meta-user/conf/layer.conf

    BBPATH .= ":${LAYERDIR}" BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ ${LAYERDIR}/recipes-*/*/*.bbappend" BBFILES_DYNAMIC += " \ xilinx-tools:${LAYERDIR}/meta-xilinx-tools/recipes-*/*/*.bbappend \ " BBFILE_COLLECTIONS += "meta-user" BBFILE_PATTERN_meta-user = "^${LAYERDIR}/" BBFILE_PRIORITY_meta-user = "7" LAYERSERIES_COMPAT_meta-user = "scarthgap" BBMASK += "meta-adi-xilinx/recipes-bsp/device-tree/"

    Applied Device Tree Changes:

    / {

    model = "Analog Devices ADRV9361-Z7035 (Z7035/AD9361)";

    memory {

    device_type = "memory";

    reg = <0x00000000 0x40000000>;

    };

    /*chosen {

    * stdout-path = "/amba@0/uart@E0001000";

    * };

    */

    clocks {

    xo_40mhz_fixed_clk: clock@0 {

    #clock-cells = <0>;

    compatible = "adjustable-clock";

    clock-frequency = <40000000>;

    clock-accuracy = <200000>; /* 200 ppm (ppb) */

    clock-output-names = "XO_40MHz";

    };

    usb_ulpi_fixed_clk: clock@2 {

    #clock-cells = <0>;

    compatible = "fixed-clock";

    clock-frequency = <24000000>;

    clock-output-names = "24MHz";

    };

    };

    ad9361_clkin: ad9361-refclk-gpio-gate@0 {

    #clock-cells = <0>;

    compatible = "gpio-gate-clock";

    clocks = <&xo_40mhz_fixed_clk>;

    enable-gpios = <&gpio0 105 0>; /* Set to 1 for extern AD9361_CLK (J1 on PZSDRCC-FMC) */

    clock-output-names = "ad9361_ext_refclk";

    };

    usb_ulpi_clk: usb-ulpe-gpio-gate@0 {

    #clock-cells = <0>;

    compatible = "gpio-gate-clock";

    clocks = <&usb_ulpi_fixed_clk>;

    enable-gpios = <&gpio0 9 1>; /* Active Low */

    };

    };

    &gem0 {

    phy-handle = <&phy0>;

    phy-mode = "rgmii-id";

    phy0: phy@0 {

    device_type = "ethernet-phy";

    reg = <0x0>;

    marvell,reg-init = <3 16 0xff00 0x1e 3 17 0xfff0 0x00>;

    };

    };

    &usb0 {

    xlnx,phy-reset-gpio = <&gpio0 7 1>;

    };

    /*&qspi {

    * status = "okay";

    * is-dual = <0>;

    * num-cs = <1>;

    * primary_flash: ps7-qspi@0 {

    * #address-cells = <1>;

    * #size-cells = <1>;

    * ** spi-tx-bus-width = <1>;

    * spi-rx-bus-width = <4>;

    * compatible = "n25q256a", "jedec,spi-nor"; /* same as S25FL256

    * reg = <0x0>;

    * spi-max-frequency = <50000000>;

    * partition@qspi-fsbl-uboot {

    * label = "qspi-fsbl-uboot";

    * reg = <0x0 0xE0000>; /* 896k

    * };

    * partition@qspi-uboot-env {

    * label = "qspi-uboot-env";

    * reg = <0xE0000 0x20000>; /* 128k

    * };

    * partition@qspi-linux {

    * label = "qspi-linux";

    * reg = <0x100000 0x500000>; /* 5M

    * };

    * partition@qspi-device-tree {

    * label = "qspi-device-tree";

    * reg = <0x600000 0x20000>; /* 128k

    * };

    * partition@qspi-rootfs {

    * label = "qspi-rootfs";

    * reg = <0x620000 0xCE0000>; /* 12875k

    * };

    * partition@qspi-bitstream {

    * label = "qspi-bitstream";

    * reg = <0x1300000 0xD00000>; /* 13 M

    * };

    * };

    }; */

    &sdhci0 {

    status = "okay";

    disable-wp;

    };

    / {

    fpga_axi: fpga-axi@0 {

    compatible = "simple-bus";

    #address-cells = <0x1>;

    #size-cells = <0x1>;

    ranges;

    axi_i2c0: i2c@41600000 {

    compatible = "xlnx,axi-iic-1.02.a", "xlnx,xps-iic-2.00.a";

    reg = <0x41600000 0x10000>;

    interrupt-parent = <&intc>;

    interrupts = <0 58 4>;

    clocks = <&clkc 15>;

    clock-names = "pclk";

    #address-cells = <1>;

    #size-cells = <0>;

    adm1166: adm1166@68 {

    compatible = "adi,adm1166";

    reg = <0x68>;

    };

    };

    rx_dma: dma-controller@7c400000 {

    compatible = "adi,axi-dmac-1.00.a";

    reg = <0x7c400000 0x1000>;

    #dma-cells = <1>;

    interrupts = <0 57 4>;

    clocks = <&clkc 16>;

    };

    tx_dma: dma-controller@7c420000 {

    compatible = "adi,axi-dmac-1.00.a";

    reg = <0x7c420000 0x1000>;

    #dma-cells = <1>;

    interrupts = <0 56 4>;

    clocks = <&clkc 16>;

    };

    cf_ad9361_adc_core_0: cf-ad9361-lpc@79020000 {

    compatible = "adi,axi-ad9361-6.00.a";

    reg = <0x79020000 0x6000>;

    dmas = <&rx_dma 0>;

    dma-names = "rx";

    spibus-connected = <&adc0_ad9361>;

    };

    cf_ad9361_dac_core_0: cf-ad9361-dds-core-lpc@79024000 {

    compatible = "adi,axi-ad9361-dds-6.00.a";

    reg = <0x79024000 0x1000>;

    clocks = <&adc0_ad9361 13>;

    clock-names = "sampl_clk";

    dmas = <&tx_dma 0>;

    dma-names = "tx";

    };

    /* mwipcore@43c00000 {

    * compatible = "mathworks,mwipcore-axi4lite-v1.00";

    * reg = <0x43C00000 0xffff>;

    * }; */

    axi_sysid_0: axi-sysid-0@45000000 {

    compatible = "adi,axi-sysid-1.00.a";

    reg = <0x45000000 0x10000>;

    };

    };

    };

    &spi0 {

    status = "okay";

    adc0_ad9361: ad9361-phy@0 {

    #address-cells = <1>;

    #size-cells = <0>;

    #clock-cells = <1>;

    compatible = "adi,ad9361";

    /* SPI Setup */

    reg = <0>;

    spi-cpha;

    spi-max-frequency = <10000000>;

    /* Clocks */

    clocks = <&ad9361_clkin 0>;

    clock-names = "ad9361_ext_refclk";

    clock-output-names = "rx_sampl_clk", "tx_sampl_clk";

    /* Digital Interface Control */

    /* adi,digital-interface-tune-skip-mode:

    * 0 = TUNE RX&TX

    * 1 = SKIP TX

    * 2 = SKIP ALL

    */

    adi,digital-interface-tune-skip-mode = <0>;

    adi,pp-tx-swap-enable;

    adi,pp-rx-swap-enable;

    adi,rx-frame-pulse-mode-enable;

    adi,lvds-mode-enable;

    adi,lvds-bias-mV = <150>;

    adi,lvds-rx-onchip-termination-enable;

    adi,rx-data-delay = <4>;

    adi,tx-fb-clock-delay = <7>;

    adi,xo-disable-use-ext-refclk-enable;

    /* Mode Setup */

    adi,2rx-2tx-mode-enable;

    //adi,split-gain-table-mode-enable;

    /* ENSM Mode */

    adi,frequency-division-duplex-mode-enable;

    //adi,ensm-enable-pin-pulse-mode-enable;

    //adi,ensm-enable-txnrx-control-enable;

    /* adi,rx-rf-port-input-select:

    * 0 = (RX1A_N & RX1A_P) and (RX2A_N & RX2A_P) enabled; balanced

    * 1 = (RX1B_N & RX1B_P) and (RX2B_N & RX2B_P) enabled; balanced

    * 2 = (RX1C_N & RX1C_P) and (RX2C_N & RX2C_P) enabled; balanced

    *

    * 3 = RX1A_N and RX2A_N enabled; unbalanced

    * 4 = RX1A_P and RX2A_P enabled; unbalanced

    * 5 = RX1B_N and RX2B_N enabled; unbalanced

    * 6 = RX1B_P and RX2B_P enabled; unbalanced

    * 7 = RX1C_N and RX2C_N enabled; unbalanced

    * 8 = RX1C_P and RX2C_P enabled; unbalanced

    */

    adi,rx-rf-port-input-select = <0>; /* (RX1A_N & RX1A_P) and (RX2A_N & RX2A_P) enabled; balanced */

    /* adi,tx-rf-port-input-select:

    * 0 TX1A, TX2A

    * 1 TX1B, TX2B

    */

    adi,tx-rf-port-input-select = <0>; /* TX1A, TX2A */

    //adi,update-tx-gain-in-alert-enable;

    adi,tx-attenuation-mdB = <10000>;

    adi,tx-lo-powerdown-managed-enable;

    adi,rf-rx-bandwidth-hz = <18000000>;

    adi,rf-tx-bandwidth-hz = <18000000>;

    adi,rx-synthesizer-frequency-hz = /bits/ 64 <2400000000>;

    adi,tx-synthesizer-frequency-hz = /bits/ 64 <2450000000>;

    /* BBPLL ADC R2CLK R1CLK CLKRF RSAMPL */

    adi,rx-path-clock-frequencies = <983040000 245760000 122880000 61440000 30720000 30720000>;

    /* BBPLL DAC T2CLK T1CLK CLKTF TSAMPL */

    adi,tx-path-clock-frequencies = <983040000 122880000 122880000 61440000 30720000 30720000>;

    /* Gain Control */

    /* adi,gc-rx[1|2]-mode:

    * 0 = RF_GAIN_MGC

    * 1 = RF_GAIN_FASTATTACK_AGC

    * 2 = RF_GAIN_SLOWATTACK_AGC

    * 3 = RF_GAIN_HYBRID_AGC

    */

    adi,gc-rx1-mode = <2>;

    adi,gc-rx2-mode = <2>;

    adi,gc-adc-ovr-sample-size = <4>; /* sum 4 samples */

    adi,gc-adc-small-overload-thresh = <47>; /* sum of squares */

    adi,gc-adc-large-overload-thresh = <58>; /* sum of squares */

    adi,gc-lmt-overload-high-thresh = <800>; /* mV */

    adi,gc-lmt-overload-low-thresh = <704>; /* mV */

    adi,gc-dec-pow-measurement-duration = <8192>; /* 0..524288 Samples */

    adi,gc-low-power-thresh = <24>; /* 0..-64 dBFS vals are set pos */

    //adi,gc-dig-gain-enable;

    //adi,gc-max-dig-gain = <15>;

    /* Manual Gain Control Setup */

    //adi,mgc-rx1-ctrl-inp-enable; /* uncomment to use ctrl inputs */

    //adi,mgc-rx2-ctrl-inp-enable; /* uncomment to use ctrl inputs */

    adi,mgc-inc-gain-step = <2>;

    adi,mgc-dec-gain-step = <2>;

    /* adi,mgc-split-table-ctrl-inp-gain-mode:

    * (relevant if adi,split-gain-table-mode-enable is set)

    * 0 = AGC determine this

    * 1 = only in LPF

    * 2 = only in LMT

    */

    adi,mgc-split-table-ctrl-inp-gain-mode = <0>;

    /* Automatic Gain Control Setup */

    adi,agc-attack-delay-extra-margin-us= <1>; /* us */

    adi,agc-outer-thresh-high = <5>; /* -dBFS */

    adi,agc-outer-thresh-high-dec-steps = <2>; /* 0..15 */

    adi,agc-inner-thresh-high = <10>; /* -dBFS */

    adi,agc-inner-thresh-high-dec-steps = <1>; /* 0..7 */

    adi,agc-inner-thresh-low = <12>; /* -dBFS */

    adi,agc-inner-thresh-low-inc-steps = <1>; /* 0..7 */

    adi,agc-outer-thresh-low = <18>; /* -dBFS */

    adi,agc-outer-thresh-low-inc-steps = <2>; /* 0..15 */

    adi,agc-adc-small-overload-exceed-counter = <10>; /* 0..15 */

    adi,agc-adc-large-overload-exceed-counter = <10>; /* 0..15 */

    adi,agc-adc-large-overload-inc-steps = <2>; /* 0..15 */

    //adi,agc-adc-lmt-small-overload-prevent-gain-inc-enable;

    adi,agc-lmt-overload-large-exceed-counter = <10>; /* 0..15 */

    adi,agc-lmt-overload-small-exceed-counter = <10>; /* 0..15 */

    adi,agc-lmt-overload-large-inc-steps = <2>; /* 0..7 */

    //adi,agc-dig-saturation-exceed-counter = <3>; /* 0..15 */

    //adi,agc-dig-gain-step-size = <4>; /* 1..8 */

    //adi,agc-sync-for-gain-counter-enable;

    adi,agc-gain-update-interval-us = <1000>; /* 1ms */

    //adi,agc-immed-gain-change-if-large-adc-overload-enable;

    //adi,agc-immed-gain-change-if-large-lmt-overload-enable;

    /* Fast AGC */

    adi,fagc-dec-pow-measurement-duration = <64>; /* 64 Samples */

    //adi,fagc-allow-agc-gain-increase-enable;

    adi,fagc-lp-thresh-increment-steps = <1>;

    adi,fagc-lp-thresh-increment-time = <5>;

    adi,fagc-energy-lost-stronger-sig-gain-lock-exit-cnt = <8>;

    adi,fagc-final-overrange-count = <3>;

    //adi,fagc-gain-increase-after-gain-lock-enable;

    adi,fagc-gain-index-type-after-exit-rx-mode = <0>;

    adi,fagc-lmt-final-settling-steps = <1>;

    adi,fagc-lock-level = <10>;

    adi,fagc-lock-level-gain-increase-upper-limit = <5>;

    adi,fagc-lock-level-lmt-gain-increase-enable;

    adi,fagc-lpf-final-settling-steps = <1>;

    adi,fagc-optimized-gain-offset = <5>;

    adi,fagc-power-measurement-duration-in-state5 = <64>;

    adi,fagc-rst-gla-engergy-lost-goto-optim-gain-enable;

    adi,fagc-rst-gla-engergy-lost-sig-thresh-below-ll = <10>;

    adi,fagc-rst-gla-engergy-lost-sig-thresh-exceeded-enable;

    adi,fagc-rst-gla-if-en-agc-pulled-high-mode = <0>;

    adi,fagc-rst-gla-large-adc-overload-enable;

    adi,fagc-rst-gla-large-lmt-overload-enable;

    adi,fagc-rst-gla-stronger-sig-thresh-above-ll = <10>;

    adi,fagc-rst-gla-stronger-sig-thresh-exceeded-enable;

    adi,fagc-state-wait-time-ns = <260>;

    adi,fagc-use-last-lock-level-for-set-gain-enable;

    /* RSSI */

    /* adi,rssi-restart-mode:

    * 0 = AGC_IN_FAST_ATTACK_MODE_LOCKS_THE_GAIN,

    * 1 = EN_AGC_PIN_IS_PULLED_HIGH,

    * 2 = ENTERS_RX_MODE,

    * 3 = GAIN_CHANGE_OCCURS,

    * 4 = SPI_WRITE_TO_REGISTER,

    * 5 = GAIN_CHANGE_OCCURS_OR_EN_AGC_PIN_PULLED_HIGH,

    */

    adi,rssi-restart-mode = <3>;

    //adi,rssi-unit-is-rx-samples-enable;

    adi,rssi-delay = <1>; /* 1us */

    adi,rssi-wait = <1>; /* 1us */

    adi,rssi-duration = <1000>; /* 1ms */

    /* Control Outputs */

    adi,ctrl-outs-index = <0>;

    adi,ctrl-outs-enable-mask = <0xFF>;

    /* AuxADC Temp Sense Control */

    adi,temp-sense-measurement-interval-ms = <1000>;

    adi,temp-sense-offset-signed = <0xCE>;

    adi,temp-sense-periodic-measurement-enable;

    /* AuxDAC Control */

    adi,aux-dac-manual-mode-enable;

    adi,aux-dac1-default-value-mV = <0>;

    //adi,aux-dac1-active-in-rx-enable;

    //adi,aux-dac1-active-in-tx-enable;

    //adi,aux-dac1-active-in-alert-enable;

    adi,aux-dac1-rx-delay-us = <0>;

    adi,aux-dac1-tx-delay-us = <0>;

    adi,aux-dac2-default-value-mV = <0>;

    //adi,aux-dac2-active-in-rx-enable;

    //adi,aux-dac2-active-in-tx-enable;

    //adi,aux-dac2-active-in-alert-enable;

    adi,aux-dac2-rx-delay-us = <0>;

    adi,aux-dac2-tx-delay-us = <0>;

    /* Control GPIOs */

    en_agc-gpios = <&gpio0 98 0>;

    sync-gpios = <&gpio0 99 0>;

    reset-gpios = <&gpio0 100 0>;

    enable-gpios = <&gpio0 101 0>;

    txnrx-gpios = <&gpio0 102 0>;

    };

    };

    system-user.dtsi

    
    

    /include/ "system-conf.dtsi"

    /include/ "zynq-adrv9361-z7035.dtsi"

    / {

    axi_i2c0 {

    ad7291-bob@2f {

    compatible = "adi,ad7291";

    reg = <0x2f>;

    };

    eeprom@50 {

    compatible = "at24,24c32";

    reg = <0x50>;

    };

    };

    leds {

    compatible = "gpio-leds";

    led0 {

    label = "led0:green";

    gpios = <&gpio0 58 0>;

    };

    led1 {

    label = "led1:green";

    gpios = <&gpio0 59 0>;

    };

    led2 {

    label = "led2:green";

    gpios = <&gpio0 60 0>;

    };

    led3 {

    label = "led3:green";

    gpios = <&gpio0 61 0>;

    };

    };

    gpio_keys {

    compatible = "gpio-keys";

    #address-cells = <1>;

    #size-cells = <0>;

    autorepeat;

    pb0 {

    label = "Left";

    linux,code = <105>;

    gpios = <&gpio0 54 0>;

    };

    pb1 {

    label = "Right";

    linux,code = <106>;

    gpios = <&gpio0 55 0>;

    };

    pb2 {

    label = "Up";

    linux,code = <103>;

    gpios = <&gpio0 56 0>;

    };

    pb3 {

    label = "Down";

    linux,code = <108>;

    gpios = <&gpio0 57 0>;

    };

    sw0 {

    label = "SW0";

    linux,input-type = <5>;

    linux,code = <13>;

    gpios = <&gpio0 62 0>;

    };

    sw1 {

    label = "SW1";

    linux,input-type = <5>;

    linux,code = <1>;

    gpios = <&gpio0 63 0>;

    };

    sw2 {

    label = "SW2";

    linux,input-type = <5>;

    linux,code = <2>;

    gpios = <&gpio0 64 0>;

    };

    sw3 {

    label = "SW3";

    linux,input-type = <5>;

    linux,code = <3>;

    gpios = <&gpio0 65 0>;

    };

    };

    };

    Full Boot Log:

    CPU: Zynq 7z035

    Silicon: v3.1

    Model: Analog Devices ADRV9ECC disabled 1 GiB (effective 2 GiB)

    Core: 32 devices, 17 uclasses, devicetree: board

    Flash: 0 Bytes

    NAND: 0 MiB

    MMC: mmc@e0100000: 0

    Loading Environment fronv area, using default environment

    In: serial@e0001000

    Ou

    ZYNQ GEM: e000b000, mdio bus e000b000, phyaddr 0, interface rg### 1 ### 0

    Found U-Boot script /boot.scr

    3830 bytes read in 7 ms (534.2 KiB/s)

    ## Executing script at 038999943 bytes read in 490 ms (17.5 MiB/s)

    ## Loading kernel fro Data Start: 0x101000f8

    Data Size: 8958544 Bytes = 8.83eac35c31d290fce38322ec8e7c7b89d3eca

    Verifying Hash Integrionf-cortexa9-linux.dtb' configuration

    Verifying Hash Integriat Device Tree

    Compression: uncompressed

    Data Startthe fdt blob at 0x1098b458

    Working FDT set to 1098b458

    Load Loading Device Tree to 2fff3000, end 2ffffa16 ... OK

    Working.1-26983-gc72cc3394581 (oe-user@oe-host) (arm-amd-linux-gnueabi-c090] revision 0 (ARMv7), cr=18c5387d

    CPU: PIPT / VIPT nonaliasootconsole [cdns0] enabled

    Memory policy: Data cache writeallocrt for each node

    Early memory node ranges

    node 0: [mem 0x0percpu: Embedded 12 pages/cpu s17356 r8192 d23604 u49152

    Kernelorder: 6, 262144 bytes, linear)

    Built 1 zonelists, mobility groSLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1

    rcu:_irqs: 16, preallocated irqs: 16

    efuse mapped to (ptrval)

    slcrl register: 0x72360000 -> 0x72760000

    L2C-310 erratum 769419 ena: Setting srcu_struct sizes based on contention.

    zynq_clock_iniource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x0

    Calibrating delay loop (skipped), value calculated using timetries: 2048 (order: 1, 8192 bytes, linear)

    Mountpoint-cache hasation.

    rcu: Max phase no-delay instances is 1000.

    smp: Bringi.66 BogoMIPS).

    CPU: All CPU(s) started in SVC mode.

    Memory: 87VFP support v0.3: implementor 41 architecture 3 part 30 variant pinctrl core: initialized pinctrl subsystem

    NET: Registered PF_platform axi: Fixed dependency cycle(s) with /axi/interrupt-contle(s) with /axi/tpiu@f8803000

    amba f8803000.tpiu: Fixed depende804000.funnel: Fixed dependency cycle(s) with /replicator

    amba /axi/ptm@f889d000

    amba f889d000.ptm: Fixed dependency cycle(s) 001000 (irq = 26, base_baud = 6249999) is a xuartps

    printk: legacy console [ttyPS0] enabled

    printk: legacy console red new interface driver hub

    pps_core: LinuxPPS API ver. 1 registered

    pps_core: Software verAdvanced Linux Sound Architecture Driver Initialized.

    clocksource: Switched to clocksource arm_global_timer

    NET: Registered PF_INET protocol family

    IP idents hash table entries: 16384 (order: 5, 131072 bytes, lin bytes, linear)

    linear)

    TCP established hash table entries: 8192 (order: 3, 32768 bytes,r)

    TCP: Hash tables configured (established 8192 bind 8192)

    ered udp transport module.

    RPC: Registered tcp transport moduleworkingset: timestamp_bits=30 max_order=18 bucket_order=0

    registered

    Key type id_legacy registered

    nfs4filelayout_init:

    io scheduler kyber registered

    io scheduler bfq registered

    not found

    not found

    dma-pl330 f8003000.dma-controller: Loaded driver for PL330 DMAC-loop: module loaded

    MACsec IEEE 802.1AE

    tun: Universal TUN/TAP device driver, 1.6

    0b000 irq 40 (00:05:f7:80:0e:26)

    macb e000c000.ethernet: invalid hw address, using random

    macb e000c000.ethernet eth1: Cadence GEM rev 0x00020118 at 0xe00usbcore: registered new interface driver asix

    usbcore: registertered new interface driver cdc_ncm

    usbcore: registered new inted new interface driver usb-storage

    usbcore: registered new interface driver usbserial_generic

    usbsw interface driver upd78f0730

    usbserial: USB Serial support regULPI transceiver vendor/product ID 0x0424/0x0007

    Found SMSC USBtting system clock to 1970-01-01T00:00:39 UTC (39)

    es driver

    cdns-wdt f8005000.watchdog: Xilinx Watchdog Timer with timeout 1opyright(c) Pierre Ossman

    sdhci-pltfm: SDHCI platform and OF drax_idle_ns: 537538477 ns

    core driver

    SPI driver fb_seps525 has no spi_device_id for syncoam,seps525

    mmc0: SDHCI controller on e0100000.mmc [e0100000.mmc] using ADMAmmcblk0: mmc0:aaaa SD32G 29.7 GiB

    zed

    armv7-pmu f8891000.pmu: hw perfevents: no interrupt-affinity prohw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 (80000axi_sysid 45000000.axi-sysid-0: AXI System ID core version (1.01axi_sysid 45000000.axi-sysid-0: [adrv9361z7035_ccbob] on [lvds] Segment Routing with IPv6

    In-situ OAM (IOAM) with IPv6

    sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver

    NET: Registered PF_IEEE802154 protocol family

    Key type dns_resoRegistering SWP/SWPB emulation handler

    of-fpga-region fpga-region: FPGA Region probed

    input: gpio_keys as /devices/soc0/gpio_keys/input/input0

    of_cfs_init

    of_cfs_init: OK

    ALSA device list:

    No soundcards found.

    EXT4-fs (mmcblk0p2): mounted filesystem 92eadf1c-c9a0-48ba-882c-VFS: Mounted root (ext4 filesystem) readonly on device 179:2.

    Freeing unused kernel image (initmem) memory: 1024K

    Run /sbin/init as init process

    INIT: version 3.04 booting

    Starting udev

    udevd[88]: starting version 3.2.14

    random: crng init done

    udevd[89]: starting eudev-3.2.14

    macb e000c000.ethernet eth1: validation of with support 00,0000platform 79020000.cf-ad9361-lpc: deferred probe pending: (reasonth1 is taking a long time

    EXT4-fs (mmcblk0p2): re-mounted 92eadf1c-c9a0-48ba-882c-482d7721sysctl: cannot stat /proc/sys/net/ipv4/tcp_syncookies: No such fhwclock: settimeofday() failed: Invalid argument

    Fri Mar 9 12:39:35 UTC 2018

    INIT: Entering runlevel: 5

    Configuring network interfaces... eth0

    udhcpc: broadcasting discover

    udhcpc: no lease, failing

    ifup: failed to bring up eth

    Starting system message bus: dbus.

    Starting OpenBSD Secure Shell server: sshd

    done.

    Starting rpcbind daemon...done.

    starting statd: done

    egrep: warning: egrep is obsolescent; using grep -E

    starting DNS forwarder and DHCP server: dnsmasq... done.

    fancontrold

    Starting IIO Daemon: iiod

    Starting internet superserver: inetdStarting syslogd/klogd: done

    * Starting Avahi mDNS/DNS-SD Daemon: avahi-daemon

    *************************************************************for more details.

    *********************************************-sdt-dtsi login: udevd[98]: timeout '/etc/udev/scripts/network.sh'

    udevd[98]: timeout: killing '/etc/udev/scripts/network.sh' [106]gnal 9 (Killed)

    ##reboot

    CPU: Zynq 7z035

    Silicon: v3.1

    Model: Analog Devices ADRV91 GiB (effective 2 GiB)

    Core: 32 devices, 17 uclasses, devicetree: board

    Flash: 0 Bytenv area, using default environment

    In: serial@e0001000

    Oumii-id

    eth0: ethernet@e000b000

    ### 1 switch to partitions #0, OK

    mmc0 is current device

    3830 bytes read in 7 ms (534.2 KiB/s)

    ## Executing script at 03m FIT Image at 10100000 ...

    Using 'conf-cortexa9-linux.dtb' Data Start: 0x101000f8

    Data Size: 8958544 Bytes = 8.83eac35c31d290fce38322ec8e7c7b89d3eca

    Verifying Hash Integrionf-cortexa9-linux.dtb' configuration

    Verifying Hash Integriat Device Tree

    Compression: uncompressed

    Data Startd

    Verifying Hash Integrity ... sha256+ OK

    Booting using FDT set to 2fff3000

    Starting kernel ...

    Booting Linux on physical CPU 0x0

    Linux version 6.12.0adi-v2025ing data cache, VIPT aliasing instruction cache

    OF: fdt: Machinootconsole [cdns0] enabled

    Memory policy: Data cache writealloc000000000000000-0x000000003fffffff]

    Initmem setup node 0 [mem 0 command line: console=ttyPS0,115200 earlycon root=/dev/mmcblk0puping on. Total pages: 262144

    mem auto-init: stack:all(zero), SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1

    rcu:_irqs: 16, preallocated irqs: 16

    efuse mapped to (ptrval)

    slcrl register: 0x72360000 -> 0x72760000

    L2C-310 erratum 769419 enabled

    L2C-310 enabling early BRESP for Cortex-A9

    L2C-310 full line of zeros enabled for Cortex-A9

    L2C-310 ID prefetch enabled, offset 1 lines

    L2C-310 dynamic clock gating enabled, standby m2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x76760001

    rcu: srcu_inits at 167MHz, resolution 6ns, wraps every 4398046511103ns

    clocks0

    Calibrating delay loop (skipped), value calculated using time

    pid_max: default: 32768 minimum: 301

    Mount-cache hash table enh table entries: 2048 (order: 1, 8192 bytes, linear)

    CPU0: threng up secondary CPUs ...

    CPU1: thread -1, cpu 1, socket 0, mpid8692K/1048576K available (13312K kernel code, 909K rwdata, 109489 rev 4

    clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffNETLINK/PF_ROUTE protocol family

    DMA: preallocated 256 KiB poolncy cycle(s) with /replicator

    platform replicator: Fixed depend804000.funnel: Fixed dependency cycle(s) with /replicator

    amba @f8804000

    amba f8804000.funnel: Fixed dependency cycle(s) with /axi/ptm@f889d000

    amba f889d000.ptm: Fixed dependency cycle(s) 001000 (irq = 26, base_baud = 6249999) is a xuartps

    [ttyPS0] enabled

    printk: legacy bootconsole [cdns0] disabled

    pred new interface driver hub

    . 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.iAdvanced Linux Sound Architecture Driver Initialized.

    ear)

    bytes, linear)

    linear)

    linear)

    r)

    ered udp transport module.

    RPC: Registered tcp transport moduleKey type id_resolver registered

    Key type id_legacy registered

    bounce: pool size: 64 pages

    io scheduler mq-deadline registeredledtrig-cpu: registered to indicate activity on CPUs

    not found

    not found

    241330

    dma-pl330 f8003000.dma-controller: DBUFF-128x8bytes Numloop: module loaded

    MACsec IEEE 802.1AE

    0b000 irq 40 (00:05:f7:80:0e:26)

    macb e000c000.ethernet: invalid hw address, using random

    0c000 irq 41 (c6:9f:6a:77:e4:57)

    ed new interface driver ax88179_178a

    usbcore: registered new in

    usbcore: registered new interface driver zaurus

    usbcore: regisusbcore: registered new interface driver uas

    usbcore: registereusbcore: registered new interface driver usbserial_generic

    usbserial: USB Serial support registered for generic

    usbcore: regisrt registered for FTDI USB Serial Device

    usbcore: registered neistered for upd78f0730

    3320 ULPI transceiver.

    ULPI integrity check: passed.

    rtc-test rtc-test.0: registered as rtc0

    rtc-test rtc-test.0: sertc-test rtc-test.2: registered as rtc2

    i2c_dev: i2c /dev entrigspca_main: v2.14.0 registered

    usbcore: registered new interface driver uvcvideo

    0s

    Xilinx Zynq CpuIdle Driver started

    opyright(c) Pierre Ossman

    sdhci-pltfm: SDHCI platform and OF drclocksource: ttc_clocksource: mask: 0xffff max_cycles: 0xffff, m core driver

    ad9361 spi1.0: ad9361_probe : enter (ad9361)

    mmc0: new high speed SDHC card at address aaaa

    ad9361 spi1.0: ad9361_probe : AD936x Rev 0 successfully initialiarmv7-pmu f8891000.pmu: hw perfevents: no interrupt-affinity pro03f) counters available

    .a) found

    axi_sysid 45000000.axi-sysid-0: [adrv9361z7035_ccbob] on [lvds] fpga_manager fpga0: Xilinx Zynq FPGA Manager registered

    In-situ OAM (IOAM) with IPv6

    lver registered

    clk: Disabling unused clocks

    EXT4-fs (mmcblk0p2): mounted filesystem 92eadf1c-c9a0-48ba-882c-Freeing unused kernel image (initmem) memory: 1024K

    Run /sbin/init as init process

    version 3.04 bootingudevd[89]: starting eudev-3.2.14

    0000,00000000,00006000 and advertisement 00,00000000,00000000,00 unknown)

    platform 79024000.cf-ad9361-dds-core-lpc: deferred prth1 is taking a long time

    aeea r/w. Quota mode: disabled.

    sysctl: cannot stat /proc/sys/net/ipv4/tcp_syncookies: No such fudhcpc: started, v1.36.1

    udhcpc: broadcasting discover

    udhcpc: no lease, failing

    ifup: failed to bring up eth

    Starting system message bus: Starting Fancontrol Daemon: *******************************

    The PetaLinux source code and ifor more details.

    *********************************************udevd[95]: timeout '/etc/udev/scripts/network.sh'

    udevd[95]: timeout: killing '/etc/udev/scripts/network.sh' [107]udevd[95]: '/etc/udev/scripts/network.sh' [107] terminated by si

    adrv9361-adi-sdt-dtsi login: alonalog# ## #l

    adrv9361-adi-sdt-dtsi:~$ adrv9361-adi-sdt-dtsi:~$ alo

    adrv9361-adi-sdt-dtsi:~$ analog

    Request:

    Please update the meta-adi layer to include a correct build path for the ADRV9361-Z7035-BOB. Furthermore, I suggest adopting the SDT (System Device Tree) format for future releases as it significantly streamlines development for customized FPGA projects.

    I have the FPGA hardware available and I am ready to test any official patches.

    Best regards

Reply
  • Subject: Bug Report: ADRV9361-Z7035-BOB build issues in meta-adi and proposed SDT-based fix

    Dear Analog Devices Team,

    I am reporting a persistent issue with the build process for the zynq-adrv9361-z7035-bob branch. Currently, the meta-adi layer builds the system for the Z706 board instead of the ADRV9361-Z7035.

    I have successfully developed a workaround using the official ADI DTSI/DTS files and the kernel repository path: arch/arm/boot/dts/xilinx/zynq-adrv9361-z7035-bob.dts.

    Identified Issues:

    1. DTSI Bugs: I found errors in arch/arm/boot/dts/xilinx/zynq-adrv9361-z7035.dtsi which required manual correction.

    2. Missing DMA Driver: The xilinx-dma driver was disabled in the Kernel, causing interrupt errors. Enabling it resolved the issue, though Ethernet still requires further verification.

    Reproduction and Build Path (PetaLinux 2025.1 with SDT):

    I am using the System Device Tree (SDT) format for better project flexibility:

    1. SDT Generation: sdtgen -eval "set_dt_param -xsa system_top.xsa -dir sdt_outputadrv; generate_sdt"

    2. Project Integration: petalinux-config –get-hw-description=./ sdt_outputadrv

    Project Configuration Files:

    1. /project-spec/meta-user/recipes-bsp/device-tree/device-tree.bbappend

    FILESEXTRAPATHS:prepend := "${THISDIR}/files:" SRC_URI:append = " file://system-user.dtsi \ file://zynq-adrv9361-z7035.dtsi" KERNEL_INCLUDE:append = " \ ${STAGING_KERNEL_DIR}/include" KERNEL_DTB_PATH = "${WORKDIR}" require ${@'device-tree-sdt.inc' if d.getVar('SYSTEM_DTFILE') != '' else ''}

    2. project-spec/meta-user/conf/layer.conf

    BBPATH .= ":${LAYERDIR}" BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ ${LAYERDIR}/recipes-*/*/*.bbappend" BBFILES_DYNAMIC += " \ xilinx-tools:${LAYERDIR}/meta-xilinx-tools/recipes-*/*/*.bbappend \ " BBFILE_COLLECTIONS += "meta-user" BBFILE_PATTERN_meta-user = "^${LAYERDIR}/" BBFILE_PRIORITY_meta-user = "7" LAYERSERIES_COMPAT_meta-user = "scarthgap" BBMASK += "meta-adi-xilinx/recipes-bsp/device-tree/"

    Applied Device Tree Changes:

    / {

    model = "Analog Devices ADRV9361-Z7035 (Z7035/AD9361)";

    memory {

    device_type = "memory";

    reg = <0x00000000 0x40000000>;

    };

    /*chosen {

    * stdout-path = "/amba@0/uart@E0001000";

    * };

    */

    clocks {

    xo_40mhz_fixed_clk: clock@0 {

    #clock-cells = <0>;

    compatible = "adjustable-clock";

    clock-frequency = <40000000>;

    clock-accuracy = <200000>; /* 200 ppm (ppb) */

    clock-output-names = "XO_40MHz";

    };

    usb_ulpi_fixed_clk: clock@2 {

    #clock-cells = <0>;

    compatible = "fixed-clock";

    clock-frequency = <24000000>;

    clock-output-names = "24MHz";

    };

    };

    ad9361_clkin: ad9361-refclk-gpio-gate@0 {

    #clock-cells = <0>;

    compatible = "gpio-gate-clock";

    clocks = <&xo_40mhz_fixed_clk>;

    enable-gpios = <&gpio0 105 0>; /* Set to 1 for extern AD9361_CLK (J1 on PZSDRCC-FMC) */

    clock-output-names = "ad9361_ext_refclk";

    };

    usb_ulpi_clk: usb-ulpe-gpio-gate@0 {

    #clock-cells = <0>;

    compatible = "gpio-gate-clock";

    clocks = <&usb_ulpi_fixed_clk>;

    enable-gpios = <&gpio0 9 1>; /* Active Low */

    };

    };

    &gem0 {

    phy-handle = <&phy0>;

    phy-mode = "rgmii-id";

    phy0: phy@0 {

    device_type = "ethernet-phy";

    reg = <0x0>;

    marvell,reg-init = <3 16 0xff00 0x1e 3 17 0xfff0 0x00>;

    };

    };

    &usb0 {

    xlnx,phy-reset-gpio = <&gpio0 7 1>;

    };

    /*&qspi {

    * status = "okay";

    * is-dual = <0>;

    * num-cs = <1>;

    * primary_flash: ps7-qspi@0 {

    * #address-cells = <1>;

    * #size-cells = <1>;

    * ** spi-tx-bus-width = <1>;

    * spi-rx-bus-width = <4>;

    * compatible = "n25q256a", "jedec,spi-nor"; /* same as S25FL256

    * reg = <0x0>;

    * spi-max-frequency = <50000000>;

    * partition@qspi-fsbl-uboot {

    * label = "qspi-fsbl-uboot";

    * reg = <0x0 0xE0000>; /* 896k

    * };

    * partition@qspi-uboot-env {

    * label = "qspi-uboot-env";

    * reg = <0xE0000 0x20000>; /* 128k

    * };

    * partition@qspi-linux {

    * label = "qspi-linux";

    * reg = <0x100000 0x500000>; /* 5M

    * };

    * partition@qspi-device-tree {

    * label = "qspi-device-tree";

    * reg = <0x600000 0x20000>; /* 128k

    * };

    * partition@qspi-rootfs {

    * label = "qspi-rootfs";

    * reg = <0x620000 0xCE0000>; /* 12875k

    * };

    * partition@qspi-bitstream {

    * label = "qspi-bitstream";

    * reg = <0x1300000 0xD00000>; /* 13 M

    * };

    * };

    }; */

    &sdhci0 {

    status = "okay";

    disable-wp;

    };

    / {

    fpga_axi: fpga-axi@0 {

    compatible = "simple-bus";

    #address-cells = <0x1>;

    #size-cells = <0x1>;

    ranges;

    axi_i2c0: i2c@41600000 {

    compatible = "xlnx,axi-iic-1.02.a", "xlnx,xps-iic-2.00.a";

    reg = <0x41600000 0x10000>;

    interrupt-parent = <&intc>;

    interrupts = <0 58 4>;

    clocks = <&clkc 15>;

    clock-names = "pclk";

    #address-cells = <1>;

    #size-cells = <0>;

    adm1166: adm1166@68 {

    compatible = "adi,adm1166";

    reg = <0x68>;

    };

    };

    rx_dma: dma-controller@7c400000 {

    compatible = "adi,axi-dmac-1.00.a";

    reg = <0x7c400000 0x1000>;

    #dma-cells = <1>;

    interrupts = <0 57 4>;

    clocks = <&clkc 16>;

    };

    tx_dma: dma-controller@7c420000 {

    compatible = "adi,axi-dmac-1.00.a";

    reg = <0x7c420000 0x1000>;

    #dma-cells = <1>;

    interrupts = <0 56 4>;

    clocks = <&clkc 16>;

    };

    cf_ad9361_adc_core_0: cf-ad9361-lpc@79020000 {

    compatible = "adi,axi-ad9361-6.00.a";

    reg = <0x79020000 0x6000>;

    dmas = <&rx_dma 0>;

    dma-names = "rx";

    spibus-connected = <&adc0_ad9361>;

    };

    cf_ad9361_dac_core_0: cf-ad9361-dds-core-lpc@79024000 {

    compatible = "adi,axi-ad9361-dds-6.00.a";

    reg = <0x79024000 0x1000>;

    clocks = <&adc0_ad9361 13>;

    clock-names = "sampl_clk";

    dmas = <&tx_dma 0>;

    dma-names = "tx";

    };

    /* mwipcore@43c00000 {

    * compatible = "mathworks,mwipcore-axi4lite-v1.00";

    * reg = <0x43C00000 0xffff>;

    * }; */

    axi_sysid_0: axi-sysid-0@45000000 {

    compatible = "adi,axi-sysid-1.00.a";

    reg = <0x45000000 0x10000>;

    };

    };

    };

    &spi0 {

    status = "okay";

    adc0_ad9361: ad9361-phy@0 {

    #address-cells = <1>;

    #size-cells = <0>;

    #clock-cells = <1>;

    compatible = "adi,ad9361";

    /* SPI Setup */

    reg = <0>;

    spi-cpha;

    spi-max-frequency = <10000000>;

    /* Clocks */

    clocks = <&ad9361_clkin 0>;

    clock-names = "ad9361_ext_refclk";

    clock-output-names = "rx_sampl_clk", "tx_sampl_clk";

    /* Digital Interface Control */

    /* adi,digital-interface-tune-skip-mode:

    * 0 = TUNE RX&TX

    * 1 = SKIP TX

    * 2 = SKIP ALL

    */

    adi,digital-interface-tune-skip-mode = <0>;

    adi,pp-tx-swap-enable;

    adi,pp-rx-swap-enable;

    adi,rx-frame-pulse-mode-enable;

    adi,lvds-mode-enable;

    adi,lvds-bias-mV = <150>;

    adi,lvds-rx-onchip-termination-enable;

    adi,rx-data-delay = <4>;

    adi,tx-fb-clock-delay = <7>;

    adi,xo-disable-use-ext-refclk-enable;

    /* Mode Setup */

    adi,2rx-2tx-mode-enable;

    //adi,split-gain-table-mode-enable;

    /* ENSM Mode */

    adi,frequency-division-duplex-mode-enable;

    //adi,ensm-enable-pin-pulse-mode-enable;

    //adi,ensm-enable-txnrx-control-enable;

    /* adi,rx-rf-port-input-select:

    * 0 = (RX1A_N & RX1A_P) and (RX2A_N & RX2A_P) enabled; balanced

    * 1 = (RX1B_N & RX1B_P) and (RX2B_N & RX2B_P) enabled; balanced

    * 2 = (RX1C_N & RX1C_P) and (RX2C_N & RX2C_P) enabled; balanced

    *

    * 3 = RX1A_N and RX2A_N enabled; unbalanced

    * 4 = RX1A_P and RX2A_P enabled; unbalanced

    * 5 = RX1B_N and RX2B_N enabled; unbalanced

    * 6 = RX1B_P and RX2B_P enabled; unbalanced

    * 7 = RX1C_N and RX2C_N enabled; unbalanced

    * 8 = RX1C_P and RX2C_P enabled; unbalanced

    */

    adi,rx-rf-port-input-select = <0>; /* (RX1A_N & RX1A_P) and (RX2A_N & RX2A_P) enabled; balanced */

    /* adi,tx-rf-port-input-select:

    * 0 TX1A, TX2A

    * 1 TX1B, TX2B

    */

    adi,tx-rf-port-input-select = <0>; /* TX1A, TX2A */

    //adi,update-tx-gain-in-alert-enable;

    adi,tx-attenuation-mdB = <10000>;

    adi,tx-lo-powerdown-managed-enable;

    adi,rf-rx-bandwidth-hz = <18000000>;

    adi,rf-tx-bandwidth-hz = <18000000>;

    adi,rx-synthesizer-frequency-hz = /bits/ 64 <2400000000>;

    adi,tx-synthesizer-frequency-hz = /bits/ 64 <2450000000>;

    /* BBPLL ADC R2CLK R1CLK CLKRF RSAMPL */

    adi,rx-path-clock-frequencies = <983040000 245760000 122880000 61440000 30720000 30720000>;

    /* BBPLL DAC T2CLK T1CLK CLKTF TSAMPL */

    adi,tx-path-clock-frequencies = <983040000 122880000 122880000 61440000 30720000 30720000>;

    /* Gain Control */

    /* adi,gc-rx[1|2]-mode:

    * 0 = RF_GAIN_MGC

    * 1 = RF_GAIN_FASTATTACK_AGC

    * 2 = RF_GAIN_SLOWATTACK_AGC

    * 3 = RF_GAIN_HYBRID_AGC

    */

    adi,gc-rx1-mode = <2>;

    adi,gc-rx2-mode = <2>;

    adi,gc-adc-ovr-sample-size = <4>; /* sum 4 samples */

    adi,gc-adc-small-overload-thresh = <47>; /* sum of squares */

    adi,gc-adc-large-overload-thresh = <58>; /* sum of squares */

    adi,gc-lmt-overload-high-thresh = <800>; /* mV */

    adi,gc-lmt-overload-low-thresh = <704>; /* mV */

    adi,gc-dec-pow-measurement-duration = <8192>; /* 0..524288 Samples */

    adi,gc-low-power-thresh = <24>; /* 0..-64 dBFS vals are set pos */

    //adi,gc-dig-gain-enable;

    //adi,gc-max-dig-gain = <15>;

    /* Manual Gain Control Setup */

    //adi,mgc-rx1-ctrl-inp-enable; /* uncomment to use ctrl inputs */

    //adi,mgc-rx2-ctrl-inp-enable; /* uncomment to use ctrl inputs */

    adi,mgc-inc-gain-step = <2>;

    adi,mgc-dec-gain-step = <2>;

    /* adi,mgc-split-table-ctrl-inp-gain-mode:

    * (relevant if adi,split-gain-table-mode-enable is set)

    * 0 = AGC determine this

    * 1 = only in LPF

    * 2 = only in LMT

    */

    adi,mgc-split-table-ctrl-inp-gain-mode = <0>;

    /* Automatic Gain Control Setup */

    adi,agc-attack-delay-extra-margin-us= <1>; /* us */

    adi,agc-outer-thresh-high = <5>; /* -dBFS */

    adi,agc-outer-thresh-high-dec-steps = <2>; /* 0..15 */

    adi,agc-inner-thresh-high = <10>; /* -dBFS */

    adi,agc-inner-thresh-high-dec-steps = <1>; /* 0..7 */

    adi,agc-inner-thresh-low = <12>; /* -dBFS */

    adi,agc-inner-thresh-low-inc-steps = <1>; /* 0..7 */

    adi,agc-outer-thresh-low = <18>; /* -dBFS */

    adi,agc-outer-thresh-low-inc-steps = <2>; /* 0..15 */

    adi,agc-adc-small-overload-exceed-counter = <10>; /* 0..15 */

    adi,agc-adc-large-overload-exceed-counter = <10>; /* 0..15 */

    adi,agc-adc-large-overload-inc-steps = <2>; /* 0..15 */

    //adi,agc-adc-lmt-small-overload-prevent-gain-inc-enable;

    adi,agc-lmt-overload-large-exceed-counter = <10>; /* 0..15 */

    adi,agc-lmt-overload-small-exceed-counter = <10>; /* 0..15 */

    adi,agc-lmt-overload-large-inc-steps = <2>; /* 0..7 */

    //adi,agc-dig-saturation-exceed-counter = <3>; /* 0..15 */

    //adi,agc-dig-gain-step-size = <4>; /* 1..8 */

    //adi,agc-sync-for-gain-counter-enable;

    adi,agc-gain-update-interval-us = <1000>; /* 1ms */

    //adi,agc-immed-gain-change-if-large-adc-overload-enable;

    //adi,agc-immed-gain-change-if-large-lmt-overload-enable;

    /* Fast AGC */

    adi,fagc-dec-pow-measurement-duration = <64>; /* 64 Samples */

    //adi,fagc-allow-agc-gain-increase-enable;

    adi,fagc-lp-thresh-increment-steps = <1>;

    adi,fagc-lp-thresh-increment-time = <5>;

    adi,fagc-energy-lost-stronger-sig-gain-lock-exit-cnt = <8>;

    adi,fagc-final-overrange-count = <3>;

    //adi,fagc-gain-increase-after-gain-lock-enable;

    adi,fagc-gain-index-type-after-exit-rx-mode = <0>;

    adi,fagc-lmt-final-settling-steps = <1>;

    adi,fagc-lock-level = <10>;

    adi,fagc-lock-level-gain-increase-upper-limit = <5>;

    adi,fagc-lock-level-lmt-gain-increase-enable;

    adi,fagc-lpf-final-settling-steps = <1>;

    adi,fagc-optimized-gain-offset = <5>;

    adi,fagc-power-measurement-duration-in-state5 = <64>;

    adi,fagc-rst-gla-engergy-lost-goto-optim-gain-enable;

    adi,fagc-rst-gla-engergy-lost-sig-thresh-below-ll = <10>;

    adi,fagc-rst-gla-engergy-lost-sig-thresh-exceeded-enable;

    adi,fagc-rst-gla-if-en-agc-pulled-high-mode = <0>;

    adi,fagc-rst-gla-large-adc-overload-enable;

    adi,fagc-rst-gla-large-lmt-overload-enable;

    adi,fagc-rst-gla-stronger-sig-thresh-above-ll = <10>;

    adi,fagc-rst-gla-stronger-sig-thresh-exceeded-enable;

    adi,fagc-state-wait-time-ns = <260>;

    adi,fagc-use-last-lock-level-for-set-gain-enable;

    /* RSSI */

    /* adi,rssi-restart-mode:

    * 0 = AGC_IN_FAST_ATTACK_MODE_LOCKS_THE_GAIN,

    * 1 = EN_AGC_PIN_IS_PULLED_HIGH,

    * 2 = ENTERS_RX_MODE,

    * 3 = GAIN_CHANGE_OCCURS,

    * 4 = SPI_WRITE_TO_REGISTER,

    * 5 = GAIN_CHANGE_OCCURS_OR_EN_AGC_PIN_PULLED_HIGH,

    */

    adi,rssi-restart-mode = <3>;

    //adi,rssi-unit-is-rx-samples-enable;

    adi,rssi-delay = <1>; /* 1us */

    adi,rssi-wait = <1>; /* 1us */

    adi,rssi-duration = <1000>; /* 1ms */

    /* Control Outputs */

    adi,ctrl-outs-index = <0>;

    adi,ctrl-outs-enable-mask = <0xFF>;

    /* AuxADC Temp Sense Control */

    adi,temp-sense-measurement-interval-ms = <1000>;

    adi,temp-sense-offset-signed = <0xCE>;

    adi,temp-sense-periodic-measurement-enable;

    /* AuxDAC Control */

    adi,aux-dac-manual-mode-enable;

    adi,aux-dac1-default-value-mV = <0>;

    //adi,aux-dac1-active-in-rx-enable;

    //adi,aux-dac1-active-in-tx-enable;

    //adi,aux-dac1-active-in-alert-enable;

    adi,aux-dac1-rx-delay-us = <0>;

    adi,aux-dac1-tx-delay-us = <0>;

    adi,aux-dac2-default-value-mV = <0>;

    //adi,aux-dac2-active-in-rx-enable;

    //adi,aux-dac2-active-in-tx-enable;

    //adi,aux-dac2-active-in-alert-enable;

    adi,aux-dac2-rx-delay-us = <0>;

    adi,aux-dac2-tx-delay-us = <0>;

    /* Control GPIOs */

    en_agc-gpios = <&gpio0 98 0>;

    sync-gpios = <&gpio0 99 0>;

    reset-gpios = <&gpio0 100 0>;

    enable-gpios = <&gpio0 101 0>;

    txnrx-gpios = <&gpio0 102 0>;

    };

    };

    system-user.dtsi

    
    

    /include/ "system-conf.dtsi"

    /include/ "zynq-adrv9361-z7035.dtsi"

    / {

    axi_i2c0 {

    ad7291-bob@2f {

    compatible = "adi,ad7291";

    reg = <0x2f>;

    };

    eeprom@50 {

    compatible = "at24,24c32";

    reg = <0x50>;

    };

    };

    leds {

    compatible = "gpio-leds";

    led0 {

    label = "led0:green";

    gpios = <&gpio0 58 0>;

    };

    led1 {

    label = "led1:green";

    gpios = <&gpio0 59 0>;

    };

    led2 {

    label = "led2:green";

    gpios = <&gpio0 60 0>;

    };

    led3 {

    label = "led3:green";

    gpios = <&gpio0 61 0>;

    };

    };

    gpio_keys {

    compatible = "gpio-keys";

    #address-cells = <1>;

    #size-cells = <0>;

    autorepeat;

    pb0 {

    label = "Left";

    linux,code = <105>;

    gpios = <&gpio0 54 0>;

    };

    pb1 {

    label = "Right";

    linux,code = <106>;

    gpios = <&gpio0 55 0>;

    };

    pb2 {

    label = "Up";

    linux,code = <103>;

    gpios = <&gpio0 56 0>;

    };

    pb3 {

    label = "Down";

    linux,code = <108>;

    gpios = <&gpio0 57 0>;

    };

    sw0 {

    label = "SW0";

    linux,input-type = <5>;

    linux,code = <13>;

    gpios = <&gpio0 62 0>;

    };

    sw1 {

    label = "SW1";

    linux,input-type = <5>;

    linux,code = <1>;

    gpios = <&gpio0 63 0>;

    };

    sw2 {

    label = "SW2";

    linux,input-type = <5>;

    linux,code = <2>;

    gpios = <&gpio0 64 0>;

    };

    sw3 {

    label = "SW3";

    linux,input-type = <5>;

    linux,code = <3>;

    gpios = <&gpio0 65 0>;

    };

    };

    };

    Full Boot Log:

    CPU: Zynq 7z035

    Silicon: v3.1

    Model: Analog Devices ADRV9ECC disabled 1 GiB (effective 2 GiB)

    Core: 32 devices, 17 uclasses, devicetree: board

    Flash: 0 Bytes

    NAND: 0 MiB

    MMC: mmc@e0100000: 0

    Loading Environment fronv area, using default environment

    In: serial@e0001000

    Ou

    ZYNQ GEM: e000b000, mdio bus e000b000, phyaddr 0, interface rg### 1 ### 0

    Found U-Boot script /boot.scr

    3830 bytes read in 7 ms (534.2 KiB/s)

    ## Executing script at 038999943 bytes read in 490 ms (17.5 MiB/s)

    ## Loading kernel fro Data Start: 0x101000f8

    Data Size: 8958544 Bytes = 8.83eac35c31d290fce38322ec8e7c7b89d3eca

    Verifying Hash Integrionf-cortexa9-linux.dtb' configuration

    Verifying Hash Integriat Device Tree

    Compression: uncompressed

    Data Startthe fdt blob at 0x1098b458

    Working FDT set to 1098b458

    Load Loading Device Tree to 2fff3000, end 2ffffa16 ... OK

    Working.1-26983-gc72cc3394581 (oe-user@oe-host) (arm-amd-linux-gnueabi-c090] revision 0 (ARMv7), cr=18c5387d

    CPU: PIPT / VIPT nonaliasootconsole [cdns0] enabled

    Memory policy: Data cache writeallocrt for each node

    Early memory node ranges

    node 0: [mem 0x0percpu: Embedded 12 pages/cpu s17356 r8192 d23604 u49152

    Kernelorder: 6, 262144 bytes, linear)

    Built 1 zonelists, mobility groSLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1

    rcu:_irqs: 16, preallocated irqs: 16

    efuse mapped to (ptrval)

    slcrl register: 0x72360000 -> 0x72760000

    L2C-310 erratum 769419 ena: Setting srcu_struct sizes based on contention.

    zynq_clock_iniource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x0

    Calibrating delay loop (skipped), value calculated using timetries: 2048 (order: 1, 8192 bytes, linear)

    Mountpoint-cache hasation.

    rcu: Max phase no-delay instances is 1000.

    smp: Bringi.66 BogoMIPS).

    CPU: All CPU(s) started in SVC mode.

    Memory: 87VFP support v0.3: implementor 41 architecture 3 part 30 variant pinctrl core: initialized pinctrl subsystem

    NET: Registered PF_platform axi: Fixed dependency cycle(s) with /axi/interrupt-contle(s) with /axi/tpiu@f8803000

    amba f8803000.tpiu: Fixed depende804000.funnel: Fixed dependency cycle(s) with /replicator

    amba /axi/ptm@f889d000

    amba f889d000.ptm: Fixed dependency cycle(s) 001000 (irq = 26, base_baud = 6249999) is a xuartps

    printk: legacy console [ttyPS0] enabled

    printk: legacy console red new interface driver hub

    pps_core: LinuxPPS API ver. 1 registered

    pps_core: Software verAdvanced Linux Sound Architecture Driver Initialized.

    clocksource: Switched to clocksource arm_global_timer

    NET: Registered PF_INET protocol family

    IP idents hash table entries: 16384 (order: 5, 131072 bytes, lin bytes, linear)

    linear)

    TCP established hash table entries: 8192 (order: 3, 32768 bytes,r)

    TCP: Hash tables configured (established 8192 bind 8192)

    ered udp transport module.

    RPC: Registered tcp transport moduleworkingset: timestamp_bits=30 max_order=18 bucket_order=0

    registered

    Key type id_legacy registered

    nfs4filelayout_init:

    io scheduler kyber registered

    io scheduler bfq registered

    not found

    not found

    dma-pl330 f8003000.dma-controller: Loaded driver for PL330 DMAC-loop: module loaded

    MACsec IEEE 802.1AE

    tun: Universal TUN/TAP device driver, 1.6

    0b000 irq 40 (00:05:f7:80:0e:26)

    macb e000c000.ethernet: invalid hw address, using random

    macb e000c000.ethernet eth1: Cadence GEM rev 0x00020118 at 0xe00usbcore: registered new interface driver asix

    usbcore: registertered new interface driver cdc_ncm

    usbcore: registered new inted new interface driver usb-storage

    usbcore: registered new interface driver usbserial_generic

    usbsw interface driver upd78f0730

    usbserial: USB Serial support regULPI transceiver vendor/product ID 0x0424/0x0007

    Found SMSC USBtting system clock to 1970-01-01T00:00:39 UTC (39)

    es driver

    cdns-wdt f8005000.watchdog: Xilinx Watchdog Timer with timeout 1opyright(c) Pierre Ossman

    sdhci-pltfm: SDHCI platform and OF drax_idle_ns: 537538477 ns

    core driver

    SPI driver fb_seps525 has no spi_device_id for syncoam,seps525

    mmc0: SDHCI controller on e0100000.mmc [e0100000.mmc] using ADMAmmcblk0: mmc0:aaaa SD32G 29.7 GiB

    zed

    armv7-pmu f8891000.pmu: hw perfevents: no interrupt-affinity prohw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 (80000axi_sysid 45000000.axi-sysid-0: AXI System ID core version (1.01axi_sysid 45000000.axi-sysid-0: [adrv9361z7035_ccbob] on [lvds] Segment Routing with IPv6

    In-situ OAM (IOAM) with IPv6

    sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver

    NET: Registered PF_IEEE802154 protocol family

    Key type dns_resoRegistering SWP/SWPB emulation handler

    of-fpga-region fpga-region: FPGA Region probed

    input: gpio_keys as /devices/soc0/gpio_keys/input/input0

    of_cfs_init

    of_cfs_init: OK

    ALSA device list:

    No soundcards found.

    EXT4-fs (mmcblk0p2): mounted filesystem 92eadf1c-c9a0-48ba-882c-VFS: Mounted root (ext4 filesystem) readonly on device 179:2.

    Freeing unused kernel image (initmem) memory: 1024K

    Run /sbin/init as init process

    INIT: version 3.04 booting

    Starting udev

    udevd[88]: starting version 3.2.14

    random: crng init done

    udevd[89]: starting eudev-3.2.14

    macb e000c000.ethernet eth1: validation of with support 00,0000platform 79020000.cf-ad9361-lpc: deferred probe pending: (reasonth1 is taking a long time

    EXT4-fs (mmcblk0p2): re-mounted 92eadf1c-c9a0-48ba-882c-482d7721sysctl: cannot stat /proc/sys/net/ipv4/tcp_syncookies: No such fhwclock: settimeofday() failed: Invalid argument

    Fri Mar 9 12:39:35 UTC 2018

    INIT: Entering runlevel: 5

    Configuring network interfaces... eth0

    udhcpc: broadcasting discover

    udhcpc: no lease, failing

    ifup: failed to bring up eth

    Starting system message bus: dbus.

    Starting OpenBSD Secure Shell server: sshd

    done.

    Starting rpcbind daemon...done.

    starting statd: done

    egrep: warning: egrep is obsolescent; using grep -E

    starting DNS forwarder and DHCP server: dnsmasq... done.

    fancontrold

    Starting IIO Daemon: iiod

    Starting internet superserver: inetdStarting syslogd/klogd: done

    * Starting Avahi mDNS/DNS-SD Daemon: avahi-daemon

    *************************************************************for more details.

    *********************************************-sdt-dtsi login: udevd[98]: timeout '/etc/udev/scripts/network.sh'

    udevd[98]: timeout: killing '/etc/udev/scripts/network.sh' [106]gnal 9 (Killed)

    ##reboot

    CPU: Zynq 7z035

    Silicon: v3.1

    Model: Analog Devices ADRV91 GiB (effective 2 GiB)

    Core: 32 devices, 17 uclasses, devicetree: board

    Flash: 0 Bytenv area, using default environment

    In: serial@e0001000

    Oumii-id

    eth0: ethernet@e000b000

    ### 1 switch to partitions #0, OK

    mmc0 is current device

    3830 bytes read in 7 ms (534.2 KiB/s)

    ## Executing script at 03m FIT Image at 10100000 ...

    Using 'conf-cortexa9-linux.dtb' Data Start: 0x101000f8

    Data Size: 8958544 Bytes = 8.83eac35c31d290fce38322ec8e7c7b89d3eca

    Verifying Hash Integrionf-cortexa9-linux.dtb' configuration

    Verifying Hash Integriat Device Tree

    Compression: uncompressed

    Data Startd

    Verifying Hash Integrity ... sha256+ OK

    Booting using FDT set to 2fff3000

    Starting kernel ...

    Booting Linux on physical CPU 0x0

    Linux version 6.12.0adi-v2025ing data cache, VIPT aliasing instruction cache

    OF: fdt: Machinootconsole [cdns0] enabled

    Memory policy: Data cache writealloc000000000000000-0x000000003fffffff]

    Initmem setup node 0 [mem 0 command line: console=ttyPS0,115200 earlycon root=/dev/mmcblk0puping on. Total pages: 262144

    mem auto-init: stack:all(zero), SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1

    rcu:_irqs: 16, preallocated irqs: 16

    efuse mapped to (ptrval)

    slcrl register: 0x72360000 -> 0x72760000

    L2C-310 erratum 769419 enabled

    L2C-310 enabling early BRESP for Cortex-A9

    L2C-310 full line of zeros enabled for Cortex-A9

    L2C-310 ID prefetch enabled, offset 1 lines

    L2C-310 dynamic clock gating enabled, standby m2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x76760001

    rcu: srcu_inits at 167MHz, resolution 6ns, wraps every 4398046511103ns

    clocks0

    Calibrating delay loop (skipped), value calculated using time

    pid_max: default: 32768 minimum: 301

    Mount-cache hash table enh table entries: 2048 (order: 1, 8192 bytes, linear)

    CPU0: threng up secondary CPUs ...

    CPU1: thread -1, cpu 1, socket 0, mpid8692K/1048576K available (13312K kernel code, 909K rwdata, 109489 rev 4

    clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffNETLINK/PF_ROUTE protocol family

    DMA: preallocated 256 KiB poolncy cycle(s) with /replicator

    platform replicator: Fixed depend804000.funnel: Fixed dependency cycle(s) with /replicator

    amba @f8804000

    amba f8804000.funnel: Fixed dependency cycle(s) with /axi/ptm@f889d000

    amba f889d000.ptm: Fixed dependency cycle(s) 001000 (irq = 26, base_baud = 6249999) is a xuartps

    [ttyPS0] enabled

    printk: legacy bootconsole [cdns0] disabled

    pred new interface driver hub

    . 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.iAdvanced Linux Sound Architecture Driver Initialized.

    ear)

    bytes, linear)

    linear)

    linear)

    r)

    ered udp transport module.

    RPC: Registered tcp transport moduleKey type id_resolver registered

    Key type id_legacy registered

    bounce: pool size: 64 pages

    io scheduler mq-deadline registeredledtrig-cpu: registered to indicate activity on CPUs

    not found

    not found

    241330

    dma-pl330 f8003000.dma-controller: DBUFF-128x8bytes Numloop: module loaded

    MACsec IEEE 802.1AE

    0b000 irq 40 (00:05:f7:80:0e:26)

    macb e000c000.ethernet: invalid hw address, using random

    0c000 irq 41 (c6:9f:6a:77:e4:57)

    ed new interface driver ax88179_178a

    usbcore: registered new in

    usbcore: registered new interface driver zaurus

    usbcore: regisusbcore: registered new interface driver uas

    usbcore: registereusbcore: registered new interface driver usbserial_generic

    usbserial: USB Serial support registered for generic

    usbcore: regisrt registered for FTDI USB Serial Device

    usbcore: registered neistered for upd78f0730

    3320 ULPI transceiver.

    ULPI integrity check: passed.

    rtc-test rtc-test.0: registered as rtc0

    rtc-test rtc-test.0: sertc-test rtc-test.2: registered as rtc2

    i2c_dev: i2c /dev entrigspca_main: v2.14.0 registered

    usbcore: registered new interface driver uvcvideo

    0s

    Xilinx Zynq CpuIdle Driver started

    opyright(c) Pierre Ossman

    sdhci-pltfm: SDHCI platform and OF drclocksource: ttc_clocksource: mask: 0xffff max_cycles: 0xffff, m core driver

    ad9361 spi1.0: ad9361_probe : enter (ad9361)

    mmc0: new high speed SDHC card at address aaaa

    ad9361 spi1.0: ad9361_probe : AD936x Rev 0 successfully initialiarmv7-pmu f8891000.pmu: hw perfevents: no interrupt-affinity pro03f) counters available

    .a) found

    axi_sysid 45000000.axi-sysid-0: [adrv9361z7035_ccbob] on [lvds] fpga_manager fpga0: Xilinx Zynq FPGA Manager registered

    In-situ OAM (IOAM) with IPv6

    lver registered

    clk: Disabling unused clocks

    EXT4-fs (mmcblk0p2): mounted filesystem 92eadf1c-c9a0-48ba-882c-Freeing unused kernel image (initmem) memory: 1024K

    Run /sbin/init as init process

    version 3.04 bootingudevd[89]: starting eudev-3.2.14

    0000,00000000,00006000 and advertisement 00,00000000,00000000,00 unknown)

    platform 79024000.cf-ad9361-dds-core-lpc: deferred prth1 is taking a long time

    aeea r/w. Quota mode: disabled.

    sysctl: cannot stat /proc/sys/net/ipv4/tcp_syncookies: No such fudhcpc: started, v1.36.1

    udhcpc: broadcasting discover

    udhcpc: no lease, failing

    ifup: failed to bring up eth

    Starting system message bus: Starting Fancontrol Daemon: *******************************

    The PetaLinux source code and ifor more details.

    *********************************************udevd[95]: timeout '/etc/udev/scripts/network.sh'

    udevd[95]: timeout: killing '/etc/udev/scripts/network.sh' [107]udevd[95]: '/etc/udev/scripts/network.sh' [107] terminated by si

    adrv9361-adi-sdt-dtsi login: alonalog# ## #l

    adrv9361-adi-sdt-dtsi:~$ adrv9361-adi-sdt-dtsi:~$ alo

    adrv9361-adi-sdt-dtsi:~$ analog

    Request:

    Please update the meta-adi layer to include a correct build path for the ADRV9361-Z7035-BOB. Furthermore, I suggest adopting the SDT (System Device Tree) format for future releases as it significantly streamlines development for customized FPGA projects.

    I have the FPGA hardware available and I am ready to test any official patches.

    Best regards

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