ADRV9002
Recommended for New Designs
The ADRV9002 is a highly integrated RF transceiver that has dual-channel transmitters, dual-channel receivers, integrated synthesizers, and digital signal...
Datasheet
ADRV9002 on Analog.com
I have successfully generated .json (profie) from TES(Transceiver Elevation Software) with (MCS enabled RFPLL phase) and upload on IIO.

I have set MCS settings and it successfully done the multi_chip_sync

I have changed the Rx/TX ENSM to rf_enabled mode and Reload Settigs


The ILA result of my external loop Tx1 to Rx1

The Rx signal (I and Q) has some phase offset even my MCS is enabled.
I was expecting Rx signal with zero phase offset.
Is it possible to achieve external loopback signal with zero phase offset with MCS for this transceiver (ADRV9002)?
Hello,
We sincerely apologize for the delay in our response. If the question is still of interest, the first thing I would recommend is updating to our latest kernel and hdl, there have been multiple improvements made to the 9002, including some related to mcs_sync
Hi,
Please let me know the latest version of kernal an HDL.
currently I am using Vivado 2021.2, hdl_2021_r2 Kernal release 2021_R1
Hello,
The latest hdl release is hdl_2023_r2 https://github.com/analogdevicesinc/hdl/releases, however I think it requires upgrading vivado to 2023.2 as well. The latest kernel release branch is also 2023_R2 https://github.com/analogdevicesinc/linux/tree/2023_R2.
But you could also use the main branches from each repository:
https://github.com/analogdevicesinc/hdl
https://github.com/analogdevicesinc/linux/tree/main
Best regards,
Ramona
Thank you rnechita I will let you know once I test with these latest versions.