Support for two ADRV9002 devices in IIO Oscilloscope

An update:

I tried previous versions of IIO Oscilloscope. With version v0.12-rc.1, IIO Oscilloscope starts. I get a plot window and I am able to plot all four data streams from the two ADRV9002 devices but there is no 'control panel'. In other words, I don't see the tab with all of the options for setting up the ADRV9002 device like setting the LO frequency and gain.

Hi,

You need to use the 'label' attribute in the devicetree. The same as in here.

However, osc should not be crashing...

- Nuno Sá

Hello Nuno

So I tried your suggestion of giving the components unique labels using the label attribute. Below is my updated device tree extract:

/ {
	fpga_axi  {
		interrupt-parent = <&gic>;
		compatible = "simple-bus";
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges = <0 0 0 0xffffffff>;

		// HPC0
		adrv9001_0_rx1_dma: dma@84A30000 {
			compatible = "adi,axi-dmac-1.00.a";
			reg = <0x84A30000 0x10000>;
			#dma-cells = <1>;
			interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&zynqmp_clk 71>;

			adi,channels {
				#size-cells = <0>;
				#address-cells = <1>;

				dma-channel@0 {
					reg = <0>;
					adi,source-bus-width = <64>;
					adi,source-bus-type = <2>;
					adi,destination-bus-width = <64>;
					adi,destination-bus-type = <0>;
				};
			};
		};

		adrv9001_0_rx2_dma: dma@84A40000 {
			compatible = "adi,axi-dmac-1.00.a";
			reg = <0x84A40000 0x10000>;
			#dma-cells = <1>;
			interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&zynqmp_clk 71>;

			adi,channels {
				#size-cells = <0>;
				#address-cells	 = <1>;

				dma-channel@0 {
					reg = <0>;
					adi,source-bus-width = <64>;
					adi,source-bus-type = <2>;
					adi,destination-bus-width = <64>;
					adi,destination-bus-type = <0>;
				};
			};
		};

		adrv9001_0_tx1_dma: dma@84A50000 {
			compatible = "adi,axi-dmac-1.00.a";
			reg = <0x84A50000 0x10000>;
			#dma-cells = <1>;
			interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&zynqmp_clk 71>;

			adi,channels {
				#size-cells = <0>;
				#address-cells = <1>;

				dma-channel@0 {
					reg = <0>;
					adi,source-bus-width = <64>;
					adi,source-bus-type = <0>;
					adi,destination-bus-width = <64>;
					adi,destination-bus-type = <2>;
				};
			};
		};

		adrv9001_0_tx2_dma: dma@84A6000 {
			compatible = "adi,axi-dmac-1.00.a";
			reg = <0x84A60000 0x10000>;
			#dma-cells = <1>;
			interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&zynqmp_clk 71>;

			adi,channels {
				#size-cells = <0>;
				#address-cells = <1>;

				dma-channel@0 {
					reg = <0>;
					adi,source-bus-width = <64>;
					adi,source-bus-type = <0>;
					adi,destination-bus-width = <64>;
					adi,destination-bus-type = <2>;
				};
			};
		};

		adrv9001_0_axi_adrv9002_core_rx1: axi-adrv9002-rx-lpc@84A00000 {
			compatible = "adi,axi-adrv9002-rx-1.0";
			reg = <0x84A00000 0x6000>;
			clocks = <&adc0_adrv9002 0>;
			dmas = <&adrv9001_0_rx1_dma 0>;
			dma-names = "rx";
			spibus-connected = <&adc0_adrv9002>;

			label = "axi-adrv9002-rx-lpc-0";
		};

		adrv9001_0_axi_adrv9002_core_tx1: axi-adrv9002-tx-lpc@84A0A000 {
			compatible = "adi,axi-adrv9002-tx-1.0";
			reg = <0x84A0A000 0x2000>;
			clocks = <&adc0_adrv9002 1>;
			clock-names = "sampl_clk";
			dmas = <&adrv9001_0_tx1_dma 0>;
			dma-names = "tx";
			adi,axi-dds-default-scale = <0x800>;
			adi,axi-dds-default-frequency = <2000000>;

			label = "axi-adrv9002-tx-lpc-0";
		};

		adrv9001_0_axi_adrv9002_core_tdd1: axi-adrv9002-core-tdd1-lpc@84A0C800 {
			compatible = "adi,axi-tdd-1.00";
			reg = <0x84A0C800 0x400>;
			clocks = <&zynqmp_clk 71>, <&adc0_adrv9002 2>;
			clock-names = "s_axi_aclk", "intf_clk";

			//label = "axi-core-tdd-1";
			label = "axi-adrv9002-core-tdd1-lpc-0";
		};

		adrv9001_0_axi_adrv9002_core_rx2: axi-adrv9002-rx2-lpc@84A09000 {
			compatible = "adi,axi-adrv9002-rx2-1.0";
			reg = <0x84A09000 0x1000>;
			clocks = <&adc0_adrv9002 3>;
			clock-names = "sampl_clk";
			dmas = <&adrv9001_0_rx2_dma 0>;
			dma-names = "rx";

			label = "axi-adrv9002-rx2-lpc-0";
		};

		adrv9001_0_axi_adrv9002_core_tx2: axi-adrv9002-tx2-lpc@84A0C000 {
			compatible = "adi,axi-adrv9002-tx-1.0";
			reg = <0x84A0C000 0x2000>;
			clocks = <&adc0_adrv9002 4>;
			clock-names = "sampl_clk";
			dmas = <&adrv9001_0_tx2_dma 0>;
			dma-names = "tx";
			adi,axi-dds-default-scale = <0x800>;
			adi,axi-dds-default-frequency = <2000000>;

			label = "axi-adrv9002-tx2-lpc-0";
		};

		adrv9001_0_axi_adrv9002_core_tdd2: axi-adrv9002-core-tdd2-lpc@84A0CC00 {
			compatible = "adi,axi-tdd-1.00";
			reg = <0x84A0CC00 0x400>;
			clocks = <&zynqmp_clk 71>, <&adc0_adrv9002 5>;
			clock-names = "s_axi_aclk", "intf_clk";

			//label = "axi-core-tdd-2";
			label = "axi-adrv9002-core-tdd2-lpc-0";
		};
		
		// HPC1
		adrv9001_1_rx1_dma: dma@80010000 {
			compatible = "adi,axi-dmac-1.00.a";
			reg = <0x80010000 0x10000>;
			#dma-cells = <1>;
			interrupts = <0 95 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&zynqmp_clk 71>;

			adi,channels {
				#size-cells = <0>;
				#address-cells = <1>;

				dma-channel@0 {
					reg = <0>;
					adi,source-bus-width = <64>;
					adi,source-bus-type = <2>;
					adi,destination-bus-width = <64>;
					adi,destination-bus-type = <0>;
				};
			};
		};

		adrv9001_1_rx2_dma: dma@80020000 {
			compatible = "adi,axi-dmac-1.00.a";
			reg = <0x80020000 0x10000>;
			#dma-cells = <1>;
			interrupts = <0 96 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&zynqmp_clk 71>;

			adi,channels {
				#size-cells = <0>;
				#address-cells	 = <1>;

				dma-channel@0 {
					reg = <0>;
					adi,source-bus-width = <64>;
					adi,source-bus-type = <2>;
					adi,destination-bus-width = <64>;
					adi,destination-bus-type = <0>;
				};
			};
		};

		adrv9001_1_tx1_dma: dma@80030000 {
			compatible = "adi,axi-dmac-1.00.a";
			reg = <0x80030000 0x10000>;
			#dma-cells = <1>;
			interrupts = <0 93 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&zynqmp_clk 71>;

			adi,channels {
				#size-cells = <0>;
				#address-cells = <1>;

				dma-channel@0 {
					reg = <0>;
					adi,source-bus-width = <64>;
					adi,source-bus-type = <0>;
					adi,destination-bus-width = <64>;
					adi,destination-bus-type = <2>;
				};
			};
		};

		adrv9001_1_tx2_dma: dma@80040000 {
			compatible = "adi,axi-dmac-1.00.a";
			reg = <0x80040000 0x10000>;
			#dma-cells = <1>;
			interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&zynqmp_clk 71>;

			adi,channels {
				#size-cells = <0>;
				#address-cells = <1>;

				dma-channel@0 {
					reg = <0>;
					adi,source-bus-width = <64>;
					adi,source-bus-type = <0>;
					adi,destination-bus-width = <64>;
					adi,destination-bus-type = <2>;
				};
			};
		};

		adrv9001_1_axi_adrv9002_core_rx1: axi-adrv9002-rx-lpc@80000000 {
			compatible = "adi,axi-adrv9002-rx-1.0";
			reg = <0x80000000 0x6000>;
			clocks = <&adc1_adrv9002 0>;
			dmas = <&adrv9001_1_rx1_dma 0>;
			dma-names = "rx";
			spibus-connected = <&adc1_adrv9002>;

			label = "axi-adrv9002-rx-lpc-1";
		};

		adrv9001_1_axi_adrv9002_core_tx1: axi-adrv9002-tx-lpc@8000A000 {
			compatible = "adi,axi-adrv9002-tx-1.0";
			reg = <0x8000A000 0x2000>;
			clocks = <&adc1_adrv9002 1>;
			clock-names = "sampl_clk";
			dmas = <&adrv9001_1_tx1_dma 0>;
			dma-names = "tx";
			adi,axi-dds-default-scale = <0x800>;
			adi,axi-dds-default-frequency = <2000000>;

			label = "axi-adrv9002-tx-lpc-1";
		};

		adrv9001_1_axi_adrv9002_core_tdd1: axi-adrv9002-core-tdd1-lpc@8000C800 {
			compatible = "adi,axi-tdd-1.00";
			reg = <0x8000C800 0x400>;
			clocks = <&zynqmp_clk 71>, <&adc1_adrv9002 2>;
			clock-names = "s_axi_aclk", "intf_clk";

			//label = "axi-core-tdd-1";
			label = "axi-adrv9002-core-tdd1-lpc-1";
		};

		adrv9001_1_axi_adrv9002_core_rx2: axi-adrv9002-rx2-lpc@80009000 {
			compatible = "adi,axi-adrv9002-rx2-1.0";
			reg = <0x80009000 0x1000>;
			clocks = <&adc1_adrv9002 3>;
			clock-names = "sampl_clk";
			dmas = <&adrv9001_1_rx2_dma 0>;
			dma-names = "rx";

			label = "axi-adrv9002-rx2-lpc-1";
		};

		adrv9001_1_axi_adrv9002_core_tx2: axi-adrv9002-tx2-lpc@8000C000 {
			compatible = "adi,axi-adrv9002-tx-1.0";
			reg = <0x8000C000 0x2000>;
			clocks = <&adc1_adrv9002 4>;
			clock-names = "sampl_clk";
			dmas = <&adrv9001_1_tx2_dma 0>;
			dma-names = "tx";
			adi,axi-dds-default-scale = <0x800>;
			adi,axi-dds-default-frequency = <2000000>;

			label = "axi-adrv9002-tx2-lpc-1";
		};

		adrv9001_1_axi_adrv9002_core_tdd2: axi-adrv9002-core-tdd2-lpc@8000CC00 {
			compatible = "adi,axi-tdd-1.00";
			reg = <0x8000CC00 0x400>;
			clocks = <&zynqmp_clk 71>, <&adc1_adrv9002 5>;
			clock-names = "s_axi_aclk", "intf_clk";

			//label = "axi-core-tdd-2";
			label = "axi-adrv9002-core-tdd2-lpc-1";
		};

		axi_sysid_0: axi-sysid-0@85000000 {
			compatible = "adi,axi-sysid-1.00.a";
			reg = <0x85000000 0x10000>;
		};

    };
};

&spi0 {
	status = "okay";
};

#define fmc_spi spi0

#include <dt-bindings/iio/adc/adi,adrv9002.h>
#include <dt-bindings/iio/frequency/hmc7044.h>

&fmc_spi {
	status = "okay";

	adc0_adrv9002: adrv9002-phy@0 {
		compatible = "adi,adrv9002";
		reg = <0>;

		interrupt-parent = <&gpio>;
		interrupts = <122 IRQ_TYPE_EDGE_RISING>; 

		spi-max-frequency = <20000000>;
		// Clocks 
		clocks = <&hmc7044 0>;
		clock-names = "adrv9002_ext_refclk";
		clock-output-names = "rx1_sampl_clk", "tx1_sampl_clk", "tdd1_intf_clk",
				"rx2_sampl_clk", "tx2_sampl_clk", "tdd2_intf_clk";
		#clock-cells = <1>;

		reset-gpios = <&gpio 124 GPIO_ACTIVE_LOW>;

		label = "adrv9002-phy-0";

		adi,channels {
			#address-cells = <1>;
			#size-cells = <0>;

			rx@0 {
				reg = <0>;
				adi,port = <0>;
				orx-gpios = <&gpio 110 GPIO_ACTIVE_HIGH>; 
			};

			rx@1 {
				reg = <1>;
				adi,port = <0>;
				orx-gpios = <&gpio 111 GPIO_ACTIVE_HIGH>; 
			};

			tx@0 {
				reg = <0>;
				adi,port = <1>;
				adi,dpd;
			};

			tx@1 {
				reg = <1>;
				adi,port = <1>;
				adi,dpd;
			};

		};

		adi,gpios {
			#address-cells = <1>;
			#size-cells = <0>;

			gpio@0 {
				reg = <ADRV9002_DGPIO_0>;
				adi,signal = <ADRV9002_GPIO_SIGNAL_ORX_ENABLE_1>;
			};

			gpio@1 {
				reg = <ADRV9002_DGPIO_1>;
				adi,signal = <ADRV9002_GPIO_SIGNAL_ORX_ENABLE_2>;
			};
		};

		// Frequency hopping properties 
		adi,frequency-hopping {
			adi,fh-mode = <ADRV9002_FH_LO_RETUNE_REALTIME_PROCESS_DUAL_HOP>;
			adi-fh-rx-zero-if-en;

			// Depends on @adi,fh-mode being set to dual hop 
			adi,fh-hop-signal-2 {
				adi,fh-hop-rx-ports = <ADRV9002_RX_2>;
				adi,fh-hop-tx-ports = <ADRV9002_TX_2>;
			};
		};
	};

	adc1_adrv9002: adrv9002-phy@1 {
		compatible = "adi,adrv9002";
		reg = <1>;

		interrupt-parent = <&gpio>;
		interrupts = <147 IRQ_TYPE_EDGE_RISING>; // 122 + 25

		spi-max-frequency = <20000000>;
		// Clocks 
		clocks = <&hmc7044 2>;
		clock-names = "adrv9002_ext_refclk";
		clock-output-names = "rx1_sampl_clk", "tx1_sampl_clk", "tdd1_intf_clk",
				"rx2_sampl_clk", "tx2_sampl_clk", "tdd2_intf_clk";
		#clock-cells = <1>;

		reset-gpios = <&gpio 149 GPIO_ACTIVE_LOW>; // 124 + 25

		label = "adrv9002-phy-1";

		adi,channels {
			#address-cells = <1>;
			#size-cells = <0>;

			rx@0 {
				reg = <0>;
				adi,port = <0>;
				orx-gpios = <&gpio 135 GPIO_ACTIVE_HIGH>; // dgpio0 110 + 25 
			};

			rx@1 {
				reg = <1>;
				adi,port = <0>;
				orx-gpios = <&gpio 136 GPIO_ACTIVE_HIGH>; // dgpio1 111 + 25 
			};

			tx@0 {
				reg = <0>;
				adi,port = <1>;
				adi,dpd;
			};

			tx@1 {
				reg = <1>;
				adi,port = <1>;
				adi,dpd;
			};

		};

		adi,gpios {
			#address-cells = <1>;
			#size-cells = <0>;

			gpio@0 {
				reg = <ADRV9002_DGPIO_0>;
				adi,signal = <ADRV9002_GPIO_SIGNAL_ORX_ENABLE_1>;
			};

			gpio@1 {
				reg = <ADRV9002_DGPIO_1>;
				adi,signal = <ADRV9002_GPIO_SIGNAL_ORX_ENABLE_2>;
			};
		};

		// Frequency hopping properties 
		adi,frequency-hopping {
			adi,fh-mode = <ADRV9002_FH_LO_RETUNE_REALTIME_PROCESS_DUAL_HOP>;
			adi-fh-rx-zero-if-en;

			// Depends on @adi,fh-mode being set to dual hop 
			adi,fh-hop-signal-2 {
				adi,fh-hop-rx-ports = <ADRV9002_RX_2>;
				adi,fh-hop-tx-ports = <ADRV9002_TX_2>;
			};
		};
	};

	hmc7044: hmc7044@2 {
		#address-cells = <1>;
		#size-cells = <0>;
		#clock-cells = <1>;
		compatible = "adi,hmc7044";
		reg = <2>;
		spi-max-frequency = <100000>;
					
		adi,pll1-clkin-frequencies = <10000000 0 0 0>;
		adi,pll1-ref-prio-ctrl = <0x00>; // prefer CLKIN0

		adi,clkin0-buffer-mode  = <0x07>;
		adi,clkin1-buffer-mode  = <0x10>;
		adi,clkin2-buffer-mode  = <0x10>;
		adi,clkin3-buffer-mode  = <0x10>;

		adi,pll1-loop-bandwidth-hz = <32>;
		adi,pll1-charge-pump-current-ua = <1080>;

		adi,vcxo-frequency = <122880000>;

		adi,pll2-output-frequency = <2457600000>;

		adi,sysref-timer-divider = <1024>;

		adi,oscin-buffer-mode = <0x07>;

		adi,gpi-controls = <0x00 0x00 0x00 0x00>;
		adi,gpo-controls = <0x1F 0x2B 0x00 0x00>;

		adi,high-performance-mode-clock-dist-enable; // NOT USED
		adi,high-performance-mode-pll-vco-enable; // NOT USED

		adi,pulse-generator-mode = <HMC7044_PULSE_GEN_1_PULSE>;
		adi,sync-pin-mode = <0>;

		clock-output-names =
			"hmc7044_out0_ADRV9002_0_DEVCLK", "hmc7044_out1_ADRV9002_0_MCS",
			"hmc7044_out2_ADRV9002_1_DEVCLK", "hmc7044_out3_ADRV9002_1_MCS",
			"hmc7044_out4_NOT_USED", "hmc7044_out5_NOT_USED",
			"hmc7044_out6_NOT_USED", "hmc7044_out7_NOT_USED",
			"hmc7044_out8_NOT_USED","hmc7044_out9_NOT_USED",
			"hmc7044_out10_NOT_USED", "hmc7044_out11_NOT_USED",
			"hmc7044_out12_NOT_USED", "hmc7044_out13_NOT_USED";

		
		hmc7044_c0: channel@0 {
			reg = <0>;
			adi,extended-name = "hmc7044_out0_ADRV9002_0_DEVCLK";
			adi,divider = <64>;	// 38.4MHz
			adi,driver-mode = <1>;	// LVPECL
		};

		hmc7044_c1: channel@1 {
 			reg = <1>;
			adi,extended-name = "hmc7044_out1_ADRV9002_0_MCS";
			adi,divider = <1024>;	// 2.4MHz
			adi,driver-mode = <1>;	// LVPECL
			adi,startup-mode-dynamic-enable;
			adi,high-performance-mode-disable;
			adi,force-mute-enable;
			adi,coarse-digital-delay = <17>;
		};

		hmc7044_c2: channel@2 {
			reg = <2>;
			adi,extended-name = "hmc7044_out2_ADRV9002_1_DEVCLK";
			adi,divider = <64>;	// 38.4MHz
			adi,driver-mode = <1>;	// LVPECL
		};

		hmc7044_c3: channel@3 {
 			reg = <3>;
			adi,extended-name = "hmc7044_out3_ADRV9002_1_MCS";
			adi,divider = <1024>;	// 2.4MHz
			adi,driver-mode = <1>;	// LVPECL
			adi,startup-mode-dynamic-enable;
			adi,high-performance-mode-disable;
			adi,force-mute-enable;
			adi,coarse-digital-delay = <17>;
		};

	};

};

However, IIO Oscilloscope still behaves the same. When I start it, it is able to find all the IIO devices, each with their own name, as can be seen below:

But when I click Connect, the IIO Oscilloscope window closes. To confirm, I am using v0.17.

Do you have any advice for how I can get this working please?

Thank you

Gavin

Hi Gavin,

I would say to only put 'label' in the adrv9002 nodes. 

gavint said:

Do you have any advice for how I can get this working please?

At this point, I would say ro update to the latest release of osc or to the one based on 2022_R2.

- Nuno Sá

Hello Nuno

Thanks for the quick response.

I tried your suggestion of only giving labels to the adrv9002 nodes but unfortunately the behaviour is the same.

I believe that v0.17 is the latest version of IIO Oscilloscope. v0.16 and v0.15 don't even work for the case of a single ADRV9002.

Is there a separate forum for posting IIO Oscilloscope specific support requests? 

Thanks

Gavin