ADRV9002: channel phase synchronisation using TDD profile

Hi,

hmatsuza said:

In TDD mode, when port_en_mode is set to SPI, I am unable to change ensm_mode from primed to rf_enabled for Tx1 while Rx1 and Rx2 are rf_enabled using the Control in IIO Oscilloscope.

a) Is this behavior expected?

Yes it's expected as in TDD, given it's nature you can't have both RX/TX enabled.

hmatsuza said:

To enable Rx1/Rx2 and Tx1 simultaneously, is it necessary to set port_en_mode to Pin?

It's a way to bypass the above constrain as we can't control that from the driver...

hmatsuza said:

When port_en_mode is set to Pin, I want to enable Rx1/Rx2 and Tx1 simultaneously, using it as if in FDD mode.

a) Are there minimum and maximum values for the settings when using AXI-CORE-TDD in IIO Oscilloscope?
    Is there any reference documentation available?

What minimum/maximum values?

hmatsuza said:

Is it possible to control the GPIO pins of the ZedBoard or ZCU102 directly without using AXI-CORE-TDD?
    If so, how can this be achieved from Kuiper Linux?

Which GPIO pins? These are the connections available for zcu102:

https://github.com/analogdevicesinc/linux/blob/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9002.dts#L195

Then controlling GPIOs from userspace is pretty generic and there's nothing special about kuiper on that.

hmatsuza said:

Is it also possible to enable the Rx1/Rx2/Tx1 by applying a High level to the P605 on the evaluation board?

If it's in pin mode yes. But you can control the TX1_EN gpio in order to control it's state.

- Nuno Sá

Hello Nuno,

Thank you for the response.

Unknown said:

What minimum/maximum values?

I'd like to know the constraints on the following parameters: "On", "Off", "Digital Interface On", "Digital Interface Off", "VCO On", "VCO Off" for both RX and TX, and "frame length".
(e.g. frame length have to n ms longer than other longest off time, if a constrain exists)

Unknown said:

Which GPIO pins? These are the connections available for zcu102:

https://github.com/analogdevicesinc/linux/blob/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9002.dts#L195

Then controlling GPIOs from userspace is pretty generic and there's nothing special about kuiper on that.

I'm glad to know this information!
I'd like to confirm how to control the GPIO pins.
As an example, is the following method sufficient to enable RX1?

echo 126 > /sys/class/gpio/export
echo "out" >  /sys/class/gpio/gpio126/direction
echo 1 >  /sys/class/gpio/gpio126/value

For direct pin controlling method, is it correct that I don't have to care about On/Off of digital interface or VCO, which are controlled in AXI-CORE-TDD?

Thank you,

Hi,

hmatsuza said:

I'd like to know the constraints on the following parameters: "On", "Off", "Digital Interface On", "Digital Interface Off", "VCO On", "VCO Off" for both RX and TX, and "frame length".
(e.g. frame length have to n ms longer than other longest off time, if a constrain exists)

Not sure if there are any hard constrains on top of the logic ones (like on + off times being bigger than the frame_length)

Yes,that's how you use export it. Although there's an offset that you need to apply to 126. You do 'cat /sys/kernel/debug/gpio' and look for zynqmp-gpio. Then you should see an interval of gpios. Get the beginning and sum 128. That should give the exact number to export.

hmatsuza said:

For direct pin controlling method, is it correct that I don't have to care about On/Off of digital interface or VCO, which are controlled in AXI-CORE-TDD?

For a simple test don't think you have to care but not sure though. Long time without looking at that core.

- Nuno Sá