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Ethernet phy stop working after adding meta-adi layer to petalinux

Category: Software
Product Number: 0
Software Version: 2023.2

I am working with AD9361 on a custom board, but whenever I add the layer for AD9361 drivers to petalinux, the ethernet phy is not found by linux.

Net:   Could not get PHY for eth0: addr 7
No ethernet found.


It gives this error on u-boot and similar thing in linux.

How can i fix this?

macb e000b000.ethernet: invalid hw address, using random
mdio_bus e000b000.ethernet-ffffffff: MDIO device at address 0 is missing.
macb e000b000.ethernet eth0: Cadence GEM rev 0x00020118 at 0xe000b000 irq 44 (4e:b2:a1:38:7e:c5)
usbcore: registered new interface driver cdc_ether
macb e000b000.ethernet eth0: Could not attach PHY (-19)

This is dmesg | grep eth output.

 

Net:   Could not get PHY for eth0: addr 0
No ethernet found.


And this is from u-boot begining.



I added status messages.
[edited by: REevee0 at 6:43 AM (GMT -4) on 12 Jun 2024]
Parents
  • Hi,

    What devicetree are you using for building your project? As you have a custom project, this likely means you're missing or have some issue in your devicetree.

    - Nuno Sá

  • Hello, sorry for late reply.
    I found the problem, I was using adrv9364-z7020 board's device tree. It was not working because it added the following code, it could not find the phy even though the Ethernet phy was the same.
     

    phy0: phy@0 {
    		device_type = "ethernet-phy";
    		reg = <0x0>;
    		marvell,reg-init = <3 16 0xff00 0x1e 3 17 0xfff0 0x00>;
    	};

    Now the problem is that ad9361 does not activate the XO leg for refclock. Even if I delete "adi,xo-disable-use-ext-refclk-enable" from the device tree it still somehow comes back.
    This is output from dtc -i dtb /boot/devicetree/system-top.dtb
    			ad9361-phy@0 {
    				#address-cells = <0x01>;
    				#size-cells = <0x00>;
    				#clock-cells = <0x01>;
    				compatible = "adi,ad9364";
    				reg = <0x00>;
    				spi-cpha;
    				spi-max-frequency = <0x989680>;
    				clocks = <0x08 0x00>;
    				clock-names = "ad9364_ext_refclk";
    				clock-output-names = "rx_sampl_clk\0tx_sampl_clk";
    				adi,digital-interface-tune-skip-mode = <0x00>;
    				adi,pp-tx-swap-enable;
    				adi,pp-rx-swap-enable;
    				adi,rx-frame-pulse-mode-enable;
    				adi,lvds-mode-enable;
    				adi,lvds-bias-mV = <0x96>;
    				adi,lvds-rx-onchip-termination-enable;
    				adi,rx-data-delay = <0x04>;
    				adi,tx-fb-clock-delay = <0x07>;
    				adi,frequency-division-duplex-mode-enable;
    				adi,rx-rf-port-input-select = <0x00>;
    				adi,tx-rf-port-input-select = <0x00>;
    				adi,tx-attenuation-mdB = <0x2710>;
    				adi,tx-lo-powerdown-managed-enable;
    				adi,rf-rx-bandwidth-hz = <0x112a880>;
    				adi,rf-tx-bandwidth-hz = <0x112a880>;
    				adi,rx-synthesizer-frequency-hz = <0x00 0x8f0d1800>;
    				adi,tx-synthesizer-frequency-hz = <0x00 0x92080880>;
    				adi,rx-path-clock-frequencies = <0x3a980000 0xea60000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>;
    				adi,tx-path-clock-frequencies = <0x3a980000 0x7530000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>;
    				adi,gc-rx1-mode = <0x02>;
    				adi,gc-rx2-mode = <0x02>;
    				adi,gc-adc-ovr-sample-size = <0x04>;
    				adi,gc-adc-small-overload-thresh = <0x2f>;
    				adi,gc-adc-large-overload-thresh = <0x3a>;
    				adi,gc-lmt-overload-high-thresh = <0x320>;
    				adi,gc-lmt-overload-low-thresh = <0x2c0>;
    				adi,gc-dec-pow-measurement-duration = <0x2000>;
    				adi,gc-low-power-thresh = <0x18>;
    				adi,mgc-inc-gain-step = <0x02>;
    				adi,mgc-dec-gain-step = <0x02>;
    				adi,mgc-split-table-ctrl-inp-gain-mode = <0x00>;
    				adi,agc-attack-delay-extra-margin-us = <0x01>;
    				adi,agc-outer-thresh-high = <0x05>;
    				adi,agc-outer-thresh-high-dec-steps = <0x02>;
    				adi,agc-inner-thresh-high = <0x0a>;
    				adi,agc-inner-thresh-high-dec-steps = <0x01>;
    				adi,agc-inner-thresh-low = <0x0c>;
    				adi,agc-inner-thresh-low-inc-steps = <0x01>;
    				adi,agc-outer-thresh-low = <0x12>;
    				adi,agc-outer-thresh-low-inc-steps = <0x02>;
    				adi,agc-adc-small-overload-exceed-counter = <0x0a>;
    				adi,agc-adc-large-overload-exceed-counter = <0x0a>;
    				adi,agc-adc-large-overload-inc-steps = <0x02>;
    				adi,agc-lmt-overload-large-exceed-counter = <0x0a>;
    				adi,agc-lmt-overload-small-exceed-counter = <0x0a>;
    				adi,agc-lmt-overload-large-inc-steps = <0x02>;
    				adi,agc-gain-update-interval-us = <0x3e8>;
    				adi,fagc-dec-pow-measurement-duration = <0x40>;
    				adi,fagc-lp-thresh-increment-steps = <0x01>;
    				adi,fagc-lp-thresh-increment-time = <0x05>;
    				adi,fagc-energy-lost-stronger-sig-gain-lock-exit-cnt = <0x08>;
    				adi,fagc-final-overrange-count = <0x03>;
    				adi,fagc-gain-index-type-after-exit-rx-mode = <0x00>;
    				adi,fagc-lmt-final-settling-steps = <0x01>;
    				adi,fagc-lock-level = <0x0a>;
    				adi,fagc-lock-level-gain-increase-upper-limit = <0x05>;
    				adi,fagc-lock-level-lmt-gain-increase-enable;
    				adi,fagc-lpf-final-settling-steps = <0x01>;
    				adi,fagc-optimized-gain-offset = <0x05>;
    				adi,fagc-power-measurement-duration-in-state5 = <0x40>;
    				adi,fagc-rst-gla-engergy-lost-goto-optim-gain-enable;
    				adi,fagc-rst-gla-engergy-lost-sig-thresh-below-ll = <0x0a>;
    				adi,fagc-rst-gla-engergy-lost-sig-thresh-exceeded-enable;
    				adi,fagc-rst-gla-if-en-agc-pulled-high-mode = <0x00>;
    				adi,fagc-rst-gla-large-adc-overload-enable;
    				adi,fagc-rst-gla-large-lmt-overload-enable;
    				adi,fagc-rst-gla-stronger-sig-thresh-above-ll = <0x0a>;
    				adi,fagc-rst-gla-stronger-sig-thresh-exceeded-enable;
    				adi,fagc-state-wait-time-ns = <0x104>;
    				adi,fagc-use-last-lock-level-for-set-gain-enable;
    				adi,rssi-restart-mode = <0x03>;
    				adi,rssi-delay = <0x01>;
    				adi,rssi-wait = <0x01>;
    				adi,rssi-duration = <0x3e8>;
    				adi,ctrl-outs-index = <0x00>;
    				adi,ctrl-outs-enable-mask = <0xff>;
    				adi,temp-sense-measurement-interval-ms = <0x3e8>;
    				adi,temp-sense-offset-signed = <0xce>;
    				adi,temp-sense-periodic-measurement-enable;
    				adi,aux-dac-manual-mode-enable;
    				adi,aux-dac1-default-value-mV = <0x00>;
    				adi,aux-dac1-rx-delay-us = <0x00>;
    				adi,aux-dac1-tx-delay-us = <0x00>;
    				adi,aux-dac2-default-value-mV = <0x00>;
    				adi,aux-dac2-rx-delay-us = <0x00>;
    				adi,aux-dac2-tx-delay-us = <0x00>;
    				en_agc-gpios = <0x09 0x62 0x00>;
    				sync-gpios = <0x09 0x63 0x00>;
    				reset-gpios = <0x09 0x64 0x00>;
    				enable-gpios = <0x09 0x65 0x00>;
    				txnrx-gpios = <0x09 0x66 0x00>;
    				phandle = <0x16>;
    			};
    


    And this is from dtc -I fs /sys/firmware/devicetree/base


    ad9361-phy@0 {
    				adi,mgc-inc-gain-step = <0x02>;
    				adi,rf-rx-bandwidth-hz = <0x112a880>;
    				adi,gc-dec-pow-measurement-duration = <0x2000>;
    				adi,agc-adc-large-overload-exceed-counter = <0x0a>;
    				adi,pp-tx-swap-enable;
    				adi,rssi-wait = <0x01>;
    				adi,aux-dac-manual-mode-enable;
    				compatible = "adi,ad9364";
    				adi,gc-adc-small-overload-thresh = <0x2f>;
    				clocks = <0x08 0x00>;
    				adi,agc-lmt-overload-large-exceed-counter = <0x0a>;
    				adi,temp-sense-offset-signed = <0xce>;
    				adi,gc-rx1-mode = <0x02>;
    				adi,fagc-use-last-lock-level-for-set-gain-enable;
    				adi,lvds-bias-mV = <0x96>;
    				en_agc-gpios = <0x09 0x62 0x00>;
    				adi,fagc-rst-gla-engergy-lost-goto-optim-gain-enable;
    				adi,fagc-rst-gla-large-adc-overload-enable;
    				adi,rssi-duration = <0x3e8>;
    				adi,mgc-dec-gain-step = <0x02>;
    				adi,fagc-lpf-final-settling-steps = <0x01>;
    				adi,fagc-rst-gla-large-lmt-overload-enable;
    				adi,aux-dac2-default-value-mV = <0x00>;
    				spi-cpha;
    				adi,fagc-final-overrange-count = <0x03>;
    				adi,fagc-lock-level-gain-increase-upper-limit = <0x05>;
    				adi,tx-synthesizer-frequency-hz = <0x00 0x92080880>;
    				adi,agc-attack-delay-extra-margin-us = <0x01>;
    				adi,rx-data-delay = <0x04>;
    				adi,fagc-rst-gla-engergy-lost-sig-thresh-exceeded-enable;
    				clock-names = "ad9364_ext_refclk";
    				adi,tx-path-clock-frequencies = <0x3a980000 0x7530000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>;
    				adi,agc-lmt-overload-small-exceed-counter = <0x0a>;
    				adi,temp-sense-periodic-measurement-enable;
    				adi,fagc-state-wait-time-ns = <0x104>;
    				adi,fagc-gain-index-type-after-exit-rx-mode = <0x00>;
    				adi,tx-fb-clock-delay = <0x07>;
    				adi,fagc-dec-pow-measurement-duration = <0x40>;
    				adi,gc-adc-large-overload-thresh = <0x3a>;
    				txnrx-gpios = <0x09 0x66 0x00>;
    				adi,rssi-restart-mode = <0x03>;
    				adi,fagc-power-measurement-duration-in-state5 = <0x40>;
    				adi,ctrl-outs-enable-mask = <0xff>;
    				adi,rf-tx-bandwidth-hz = <0x112a880>;
    				adi,fagc-lp-thresh-increment-time = <0x05>;
    				adi,aux-dac1-tx-delay-us = <0x00>;
    				adi,tx-rf-port-input-select = <0x00>;
    				adi,tx-lo-powerdown-managed-enable;
    				adi,agc-outer-thresh-low-inc-steps = <0x02>;
    				#address-cells = <0x01>;
    				adi,rx-synthesizer-frequency-hz = <0x00 0x8f0d1800>;
    				reset-gpios = <0x09 0x64 0x00>;
    				adi,fagc-rst-gla-if-en-agc-pulled-high-mode = <0x00>;
    				adi,rx-frame-pulse-mode-enable;
    				#size-cells = <0x00>;
    				adi,agc-inner-thresh-low-inc-steps = <0x01>;
    				adi,pp-rx-swap-enable;
    				#clock-cells = <0x01>;
    				adi,rx-path-clock-frequencies = <0x3a980000 0xea60000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>;
    				phandle = <0x16>;
    				adi,fagc-lp-thresh-increment-steps = <0x01>;
    				adi,aux-dac1-default-value-mV = <0x00>;
    				adi,fagc-rst-gla-stronger-sig-thresh-above-ll = <0x0a>;
    				adi,fagc-energy-lost-stronger-sig-gain-lock-exit-cnt = <0x08>;
    				adi,tx-attenuation-mdB = <0x2710>;
    				adi,digital-interface-tune-skip-mode = <0x00>;
    				adi,agc-inner-thresh-high = <0x0a>;
    				adi,ctrl-outs-index = <0x00>;
    				adi,agc-gain-update-interval-us = <0x3e8>;
    				adi,aux-dac2-tx-delay-us = <0x00>;
    				adi,fagc-optimized-gain-offset = <0x05>;
    				adi,fagc-rst-gla-stronger-sig-thresh-exceeded-enable;
    				adi,agc-inner-thresh-high-dec-steps = <0x01>;
    				adi,aux-dac1-rx-delay-us = <0x00>;
    				reg = <0x00>;
    				adi,gc-low-power-thresh = <0x18>;
    				adi,xo-disable-use-ext-refclk-enable;
    				adi,agc-outer-thresh-low = <0x12>;
    				clock-output-names = "rx_sampl_clk\0tx_sampl_clk";
    				adi,mgc-split-table-ctrl-inp-gain-mode = <0x00>;
    				adi,fagc-lmt-final-settling-steps = <0x01>;
    				adi,lvds-mode-enable;
    				adi,gc-lmt-overload-high-thresh = <0x320>;
    				adi,agc-lmt-overload-large-inc-steps = <0x02>;
    				adi,fagc-lock-level-lmt-gain-increase-enable;
    				adi,rx-rf-port-input-select = <0x00>;
    				adi,agc-inner-thresh-low = <0x0c>;
    				adi,fagc-rst-gla-engergy-lost-sig-thresh-below-ll = <0x0a>;
    				adi,agc-outer-thresh-high-dec-steps = <0x02>;
    				adi,lvds-rx-onchip-termination-enable;
    				sync-gpios = <0x09 0x63 0x00>;
    				enable-gpios = <0x09 0x65 0x00>;
    				spi-max-frequency = <0x989680>;
    				adi,rssi-delay = <0x01>;
    				adi,agc-outer-thresh-high = <0x05>;
    				adi,frequency-division-duplex-mode-enable;
    				adi,aux-dac2-rx-delay-us = <0x00>;
    				adi,agc-adc-large-overload-inc-steps = <0x02>;
    				adi,gc-lmt-overload-low-thresh = <0x2c0>;
    				adi,gc-adc-ovr-sample-size = <0x04>;
    				adi,gc-rx2-mode = <0x02>;
    				adi,temp-sense-measurement-interval-ms = <0x3e8>;
    				adi,fagc-lock-level = <0x0a>;
    				adi,agc-adc-small-overload-exceed-counter = <0x0a>;
    			};


    In second one it have adi,xo-disable-use-ext-refclk-enable and first one it not have, where is this coming from?

Reply
  • Hello, sorry for late reply.
    I found the problem, I was using adrv9364-z7020 board's device tree. It was not working because it added the following code, it could not find the phy even though the Ethernet phy was the same.
     

    phy0: phy@0 {
    		device_type = "ethernet-phy";
    		reg = <0x0>;
    		marvell,reg-init = <3 16 0xff00 0x1e 3 17 0xfff0 0x00>;
    	};

    Now the problem is that ad9361 does not activate the XO leg for refclock. Even if I delete "adi,xo-disable-use-ext-refclk-enable" from the device tree it still somehow comes back.
    This is output from dtc -i dtb /boot/devicetree/system-top.dtb
    			ad9361-phy@0 {
    				#address-cells = <0x01>;
    				#size-cells = <0x00>;
    				#clock-cells = <0x01>;
    				compatible = "adi,ad9364";
    				reg = <0x00>;
    				spi-cpha;
    				spi-max-frequency = <0x989680>;
    				clocks = <0x08 0x00>;
    				clock-names = "ad9364_ext_refclk";
    				clock-output-names = "rx_sampl_clk\0tx_sampl_clk";
    				adi,digital-interface-tune-skip-mode = <0x00>;
    				adi,pp-tx-swap-enable;
    				adi,pp-rx-swap-enable;
    				adi,rx-frame-pulse-mode-enable;
    				adi,lvds-mode-enable;
    				adi,lvds-bias-mV = <0x96>;
    				adi,lvds-rx-onchip-termination-enable;
    				adi,rx-data-delay = <0x04>;
    				adi,tx-fb-clock-delay = <0x07>;
    				adi,frequency-division-duplex-mode-enable;
    				adi,rx-rf-port-input-select = <0x00>;
    				adi,tx-rf-port-input-select = <0x00>;
    				adi,tx-attenuation-mdB = <0x2710>;
    				adi,tx-lo-powerdown-managed-enable;
    				adi,rf-rx-bandwidth-hz = <0x112a880>;
    				adi,rf-tx-bandwidth-hz = <0x112a880>;
    				adi,rx-synthesizer-frequency-hz = <0x00 0x8f0d1800>;
    				adi,tx-synthesizer-frequency-hz = <0x00 0x92080880>;
    				adi,rx-path-clock-frequencies = <0x3a980000 0xea60000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>;
    				adi,tx-path-clock-frequencies = <0x3a980000 0x7530000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>;
    				adi,gc-rx1-mode = <0x02>;
    				adi,gc-rx2-mode = <0x02>;
    				adi,gc-adc-ovr-sample-size = <0x04>;
    				adi,gc-adc-small-overload-thresh = <0x2f>;
    				adi,gc-adc-large-overload-thresh = <0x3a>;
    				adi,gc-lmt-overload-high-thresh = <0x320>;
    				adi,gc-lmt-overload-low-thresh = <0x2c0>;
    				adi,gc-dec-pow-measurement-duration = <0x2000>;
    				adi,gc-low-power-thresh = <0x18>;
    				adi,mgc-inc-gain-step = <0x02>;
    				adi,mgc-dec-gain-step = <0x02>;
    				adi,mgc-split-table-ctrl-inp-gain-mode = <0x00>;
    				adi,agc-attack-delay-extra-margin-us = <0x01>;
    				adi,agc-outer-thresh-high = <0x05>;
    				adi,agc-outer-thresh-high-dec-steps = <0x02>;
    				adi,agc-inner-thresh-high = <0x0a>;
    				adi,agc-inner-thresh-high-dec-steps = <0x01>;
    				adi,agc-inner-thresh-low = <0x0c>;
    				adi,agc-inner-thresh-low-inc-steps = <0x01>;
    				adi,agc-outer-thresh-low = <0x12>;
    				adi,agc-outer-thresh-low-inc-steps = <0x02>;
    				adi,agc-adc-small-overload-exceed-counter = <0x0a>;
    				adi,agc-adc-large-overload-exceed-counter = <0x0a>;
    				adi,agc-adc-large-overload-inc-steps = <0x02>;
    				adi,agc-lmt-overload-large-exceed-counter = <0x0a>;
    				adi,agc-lmt-overload-small-exceed-counter = <0x0a>;
    				adi,agc-lmt-overload-large-inc-steps = <0x02>;
    				adi,agc-gain-update-interval-us = <0x3e8>;
    				adi,fagc-dec-pow-measurement-duration = <0x40>;
    				adi,fagc-lp-thresh-increment-steps = <0x01>;
    				adi,fagc-lp-thresh-increment-time = <0x05>;
    				adi,fagc-energy-lost-stronger-sig-gain-lock-exit-cnt = <0x08>;
    				adi,fagc-final-overrange-count = <0x03>;
    				adi,fagc-gain-index-type-after-exit-rx-mode = <0x00>;
    				adi,fagc-lmt-final-settling-steps = <0x01>;
    				adi,fagc-lock-level = <0x0a>;
    				adi,fagc-lock-level-gain-increase-upper-limit = <0x05>;
    				adi,fagc-lock-level-lmt-gain-increase-enable;
    				adi,fagc-lpf-final-settling-steps = <0x01>;
    				adi,fagc-optimized-gain-offset = <0x05>;
    				adi,fagc-power-measurement-duration-in-state5 = <0x40>;
    				adi,fagc-rst-gla-engergy-lost-goto-optim-gain-enable;
    				adi,fagc-rst-gla-engergy-lost-sig-thresh-below-ll = <0x0a>;
    				adi,fagc-rst-gla-engergy-lost-sig-thresh-exceeded-enable;
    				adi,fagc-rst-gla-if-en-agc-pulled-high-mode = <0x00>;
    				adi,fagc-rst-gla-large-adc-overload-enable;
    				adi,fagc-rst-gla-large-lmt-overload-enable;
    				adi,fagc-rst-gla-stronger-sig-thresh-above-ll = <0x0a>;
    				adi,fagc-rst-gla-stronger-sig-thresh-exceeded-enable;
    				adi,fagc-state-wait-time-ns = <0x104>;
    				adi,fagc-use-last-lock-level-for-set-gain-enable;
    				adi,rssi-restart-mode = <0x03>;
    				adi,rssi-delay = <0x01>;
    				adi,rssi-wait = <0x01>;
    				adi,rssi-duration = <0x3e8>;
    				adi,ctrl-outs-index = <0x00>;
    				adi,ctrl-outs-enable-mask = <0xff>;
    				adi,temp-sense-measurement-interval-ms = <0x3e8>;
    				adi,temp-sense-offset-signed = <0xce>;
    				adi,temp-sense-periodic-measurement-enable;
    				adi,aux-dac-manual-mode-enable;
    				adi,aux-dac1-default-value-mV = <0x00>;
    				adi,aux-dac1-rx-delay-us = <0x00>;
    				adi,aux-dac1-tx-delay-us = <0x00>;
    				adi,aux-dac2-default-value-mV = <0x00>;
    				adi,aux-dac2-rx-delay-us = <0x00>;
    				adi,aux-dac2-tx-delay-us = <0x00>;
    				en_agc-gpios = <0x09 0x62 0x00>;
    				sync-gpios = <0x09 0x63 0x00>;
    				reset-gpios = <0x09 0x64 0x00>;
    				enable-gpios = <0x09 0x65 0x00>;
    				txnrx-gpios = <0x09 0x66 0x00>;
    				phandle = <0x16>;
    			};
    


    And this is from dtc -I fs /sys/firmware/devicetree/base


    ad9361-phy@0 {
    				adi,mgc-inc-gain-step = <0x02>;
    				adi,rf-rx-bandwidth-hz = <0x112a880>;
    				adi,gc-dec-pow-measurement-duration = <0x2000>;
    				adi,agc-adc-large-overload-exceed-counter = <0x0a>;
    				adi,pp-tx-swap-enable;
    				adi,rssi-wait = <0x01>;
    				adi,aux-dac-manual-mode-enable;
    				compatible = "adi,ad9364";
    				adi,gc-adc-small-overload-thresh = <0x2f>;
    				clocks = <0x08 0x00>;
    				adi,agc-lmt-overload-large-exceed-counter = <0x0a>;
    				adi,temp-sense-offset-signed = <0xce>;
    				adi,gc-rx1-mode = <0x02>;
    				adi,fagc-use-last-lock-level-for-set-gain-enable;
    				adi,lvds-bias-mV = <0x96>;
    				en_agc-gpios = <0x09 0x62 0x00>;
    				adi,fagc-rst-gla-engergy-lost-goto-optim-gain-enable;
    				adi,fagc-rst-gla-large-adc-overload-enable;
    				adi,rssi-duration = <0x3e8>;
    				adi,mgc-dec-gain-step = <0x02>;
    				adi,fagc-lpf-final-settling-steps = <0x01>;
    				adi,fagc-rst-gla-large-lmt-overload-enable;
    				adi,aux-dac2-default-value-mV = <0x00>;
    				spi-cpha;
    				adi,fagc-final-overrange-count = <0x03>;
    				adi,fagc-lock-level-gain-increase-upper-limit = <0x05>;
    				adi,tx-synthesizer-frequency-hz = <0x00 0x92080880>;
    				adi,agc-attack-delay-extra-margin-us = <0x01>;
    				adi,rx-data-delay = <0x04>;
    				adi,fagc-rst-gla-engergy-lost-sig-thresh-exceeded-enable;
    				clock-names = "ad9364_ext_refclk";
    				adi,tx-path-clock-frequencies = <0x3a980000 0x7530000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>;
    				adi,agc-lmt-overload-small-exceed-counter = <0x0a>;
    				adi,temp-sense-periodic-measurement-enable;
    				adi,fagc-state-wait-time-ns = <0x104>;
    				adi,fagc-gain-index-type-after-exit-rx-mode = <0x00>;
    				adi,tx-fb-clock-delay = <0x07>;
    				adi,fagc-dec-pow-measurement-duration = <0x40>;
    				adi,gc-adc-large-overload-thresh = <0x3a>;
    				txnrx-gpios = <0x09 0x66 0x00>;
    				adi,rssi-restart-mode = <0x03>;
    				adi,fagc-power-measurement-duration-in-state5 = <0x40>;
    				adi,ctrl-outs-enable-mask = <0xff>;
    				adi,rf-tx-bandwidth-hz = <0x112a880>;
    				adi,fagc-lp-thresh-increment-time = <0x05>;
    				adi,aux-dac1-tx-delay-us = <0x00>;
    				adi,tx-rf-port-input-select = <0x00>;
    				adi,tx-lo-powerdown-managed-enable;
    				adi,agc-outer-thresh-low-inc-steps = <0x02>;
    				#address-cells = <0x01>;
    				adi,rx-synthesizer-frequency-hz = <0x00 0x8f0d1800>;
    				reset-gpios = <0x09 0x64 0x00>;
    				adi,fagc-rst-gla-if-en-agc-pulled-high-mode = <0x00>;
    				adi,rx-frame-pulse-mode-enable;
    				#size-cells = <0x00>;
    				adi,agc-inner-thresh-low-inc-steps = <0x01>;
    				adi,pp-rx-swap-enable;
    				#clock-cells = <0x01>;
    				adi,rx-path-clock-frequencies = <0x3a980000 0xea60000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>;
    				phandle = <0x16>;
    				adi,fagc-lp-thresh-increment-steps = <0x01>;
    				adi,aux-dac1-default-value-mV = <0x00>;
    				adi,fagc-rst-gla-stronger-sig-thresh-above-ll = <0x0a>;
    				adi,fagc-energy-lost-stronger-sig-gain-lock-exit-cnt = <0x08>;
    				adi,tx-attenuation-mdB = <0x2710>;
    				adi,digital-interface-tune-skip-mode = <0x00>;
    				adi,agc-inner-thresh-high = <0x0a>;
    				adi,ctrl-outs-index = <0x00>;
    				adi,agc-gain-update-interval-us = <0x3e8>;
    				adi,aux-dac2-tx-delay-us = <0x00>;
    				adi,fagc-optimized-gain-offset = <0x05>;
    				adi,fagc-rst-gla-stronger-sig-thresh-exceeded-enable;
    				adi,agc-inner-thresh-high-dec-steps = <0x01>;
    				adi,aux-dac1-rx-delay-us = <0x00>;
    				reg = <0x00>;
    				adi,gc-low-power-thresh = <0x18>;
    				adi,xo-disable-use-ext-refclk-enable;
    				adi,agc-outer-thresh-low = <0x12>;
    				clock-output-names = "rx_sampl_clk\0tx_sampl_clk";
    				adi,mgc-split-table-ctrl-inp-gain-mode = <0x00>;
    				adi,fagc-lmt-final-settling-steps = <0x01>;
    				adi,lvds-mode-enable;
    				adi,gc-lmt-overload-high-thresh = <0x320>;
    				adi,agc-lmt-overload-large-inc-steps = <0x02>;
    				adi,fagc-lock-level-lmt-gain-increase-enable;
    				adi,rx-rf-port-input-select = <0x00>;
    				adi,agc-inner-thresh-low = <0x0c>;
    				adi,fagc-rst-gla-engergy-lost-sig-thresh-below-ll = <0x0a>;
    				adi,agc-outer-thresh-high-dec-steps = <0x02>;
    				adi,lvds-rx-onchip-termination-enable;
    				sync-gpios = <0x09 0x63 0x00>;
    				enable-gpios = <0x09 0x65 0x00>;
    				spi-max-frequency = <0x989680>;
    				adi,rssi-delay = <0x01>;
    				adi,agc-outer-thresh-high = <0x05>;
    				adi,frequency-division-duplex-mode-enable;
    				adi,aux-dac2-rx-delay-us = <0x00>;
    				adi,agc-adc-large-overload-inc-steps = <0x02>;
    				adi,gc-lmt-overload-low-thresh = <0x2c0>;
    				adi,gc-adc-ovr-sample-size = <0x04>;
    				adi,gc-rx2-mode = <0x02>;
    				adi,temp-sense-measurement-interval-ms = <0x3e8>;
    				adi,fagc-lock-level = <0x0a>;
    				adi,agc-adc-small-overload-exceed-counter = <0x0a>;
    			};


    In second one it have adi,xo-disable-use-ext-refclk-enable and first one it not have, where is this coming from?

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