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Unable to build hdl design on VIVADO 2019.2

Category: Software
Product Number: EVAL_AD7768
Software Version: VIVADO 2019.2

hello, 

I am trying to build the hdl design in VIVADO 2019.2 .

I used below link:

https://wiki.analog.com/resources/fpga/docs/build

https://wiki.analog.com/resources/fpga/docs/git

https://github.com/analogdevicesinc/hdl/tree/main/projects/ad7768evb

Is it not support vivado 2019.2 version ?

sqm@Sqm-Tech:~/adi/hdl/projects/ad7768evb$ cat /home/sqm/adi/hdl/library/axi_clkgen/axi_clkgen_ip.log
/bin/sh: vivado: command not found

please check it. Provide any solution? what is the exact issue ? 

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