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ZCU102+ADRV9002 Boot up issue

Category: Hardware
  1. The board not able to communicate through the ethernet port, we tried to ping the default IP address 192.168.2.10 and got no response.
  2. When connect through UART, the UART 2 can read back the firmware version. UART0 has limited chance to call out self test menu, and could pass the self test. Other UART port had not response.
  3. Clock can be set from the System Controller GUI, and values under "Voltage" tab can be read back, all other tabs had no read back values.
  4. We followed the document XTP 428 to run BIT, test results is shown below:

The detailed log was attached, it got same errors either boot from JTAG mode, QSPI32 mode or SD mode.DOCX

  1. When boot from QSPI32 mode or SD mode, the light below is red, only under JTAG mode all lights are green
  2. We tried to restore the flash, but failed, see attached for the log.
    ECHO is off.
    ECHO is off.
    
    ****** Vivado Lab Edition v2023.2 (64-bit)
      **** SW Build 4029153 on Fri Oct 13 20:14:34 MDT 2023
        ** Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
        ** Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
    
    vivado_lab%
    vivado_lab%
    vivado_lab% cd C:/zcu102_restore_flash
    vivado_lab% source zcu102_program_qspi.tcl
    # set_param xicom.use_bitstream_version_check false
    # open_hw
    WARNING: 'open_hw' is deprecated, please use 'open_hw_manager' instead.
    # catch {disconnect_hw_server localhost:3121}
    # connect_hw_server -url localhost:3121
    INFO: [Labtools 27-2285] Connecting to hw_server url TCP:localhost:3121
    INFO: [Labtools 27-3415] Connecting to cs_server url TCP:localhost:0
    INFO: [Labtools 27-3417] Launching cs_server...
    INFO: [Labtools 27-2221] Launch Output:
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    ******** Xilinx cs_server v2023.2.0
      ****** Build date   : Oct 10 2023-00:01:56
        **** Build number : 2023.2.1696910516
          ** Copyright 2017-2022 Xilinx, Inc. All Rights Reserved.
          ** Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
    
    
    
    connect_hw_server: Time (s): cpu = 00:00:00 ; elapsed = 00:00:07 . Memory (MB): peak = 229.199 ; gain = 0.000
    # current_hw_target [get_hw_targets */xilinx_tcf/Digilent/*]
    # set_property PARAM.FREQUENCY 15000000 [get_hw_targets */xilinx_tcf/Digilent/*]
    # open_hw_target
    INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Digilent/210308B3A437
    # current_hw_device [lindex [get_hw_devices] 0]
    # refresh_hw_device -update_hw_probes false [lindex [get_hw_devices] 0]
    INFO: [Labtools 27-1434] Device xczu9 (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.
    # current_hw_device [lindex [get_hw_devices arm_dap_1] 0]
    # refresh_hw_device -update_hw_probes false [lindex [get_hw_devices arm_dap_1] 0]
    # current_hw_device [lindex [get_hw_devices] 0]
    # create_hw_cfgmem -hw_device [lindex [get_hw_devices] 0] -mem_dev  [lindex [get_cfgmem_parts {mt25qu512-qspi-x8-dual_parallel}] 0]
    # set_property PROGRAM.BLANK_CHECK  0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
    # set_property PROGRAM.ERASE  1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
    # set_property PROGRAM.CFG_PROGRAM  1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
    # set_property PROGRAM.VERIFY  1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
    # set_property PROGRAM.CHECKSUM  0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
    # refresh_hw_device [lindex [get_hw_devices] 0]
    INFO: [Labtools 27-1434] Device xczu9 (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.
    # set_property PROGRAM.ADDRESS_RANGE  {use_file} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
    # set_property PROGRAM.FILES [list "blinkbist.mcs" ] [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0]]
    # set_property PROGRAM.ZYNQ_FSBL {zynq_mp_fsbl.elf} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0]]
    # set_property PROGRAM.BLANK_CHECK  0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
    # set_property PROGRAM.ERASE  1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
    # set_property PROGRAM.CFG_PROGRAM  1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
    # set_property PROGRAM.VERIFY  1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
    # set_property PROGRAM.CHECKSUM  0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
    # program_hw_cfgmem -hw_cfgmem [get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
    Using default mini u-boot image file - C:/eng/Xilinx/Vivado_Lab/2023.2/data\xicom\cfgmem\uboot\zynqmp_qspi_x8_dual_parallel.bin
    ===== mrd->addr=0xFF5E0204, data=0x00000000 =====
    BOOT_MODE REG = 0x0000
    Downloading FSBL...
    Running FSBL...
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ===== mrd->addr=0xFFD80044, data=0x00000000 =====
    ERROR: [Xicom 50-331] Timed out while waiting for FSBL to complete.
    Problem in Initializing Hardware
    Flash programming initialization failed.
    ERROR: [Labtools 27-3161] Flash Programming Unsuccessful
    program_hw_cfgmem: Time (s): cpu = 00:00:05 ; elapsed = 00:00:15 . Memory (MB): peak = 303.500 ; gain = 52.578
    ERROR: [Common 17-39] 'program_hw_cfgmem' failed due to earlier errors.
    
        while executing
    "program_hw_cfgmem -hw_cfgmem [get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]"
        (file "zcu102_program_qspi.tcl" line 28)