Hello,
I am trying to output my own waveform from PL, on ZCU102+AD9144-FMC-EBZ,
based on the DAC-FMC_EBZ, using meta-adi in mode0 of JESD.
I got the reference design to run, and now am aiming to change the output waveform.
I understood from reading through various manuals and answers here, that the way to go is to connect my own IP in vivado to the transport core IP of JESD (to dac_ddata).
Then, modify the registers of the transport core (https://wiki.analog.com/resources/fpga/peripherals/jesd204/jesd204_tpl_dac) so that data should come from the DMA and not from the DDS.
From this thread: RE: ZC702 +FMCOMMS3 with Petalinux-2016.2
I understood that to change the registers, I should write in the linux of the ZCU102:
iio_reg axi-ad9144-hpc 0x418 2
iio_reg axi-ad9144-hpc 0x458 2
iio_reg axi-ad9144-hpc 0x498 2
iio_reg axi-ad9144-hpc 0x4D8 2
However, this is not working:
When I type these, nothing changes- I still see the 40MHz sine waves on my oscilloscope,
and aiming to read the registers that should have changed, show that they are still 0:
root@molecular-duck:~# iio_reg axi-ad9144-hpc 0x418 2 root@molecular-duck:~# iio_reg axi-ad9144-hpc 0x418 0x0 root@molecular-duck:~# iio_reg axi-ad9144-hpc 0x418 0x02 root@molecular-duck:~# iio_reg axi-ad9144-hpc 0x418 0x0 root@molecular-duck:~# iio_reg axi-ad9144-hpc 0x418 0x2 root@molecular-duck:~# iio_reg axi-ad9144-hpc 0x418 0x0 root@molecular-duck:~# iio_reg axi-ad9144-hpc 0x418 0x01 root@molecular-duck:~# iio_reg axi-ad9144-hpc 0x418 0x0 root@molecular-duck:~#
I confirmed this also with the original reference design I compiled, without any changes to the PL logic.
- What can be the problem for iio_reg not working?
- Is there any other way to change the transport layers data source from DDS to DMA in vivado and not through PS? I could turn off the DDS's by enabling "disable datapath", but can I enable DMA also?
Thanks in advance for any help! 
