Hi!
First of all, I would like to express my gratitude for your previous assistance(https://ez.analog.com/linux-software-drivers/f/q-a/569459/kernel-boot-failure-when-adding-a-new-custom-devicetree-with-petalinux), which helped me successfully start Linux and configure the AD9136. However, I am currently facing some issues with the cf_axi_dds module, as I am unable to control the DAC output to achieve the desired waveform.
I noticed that in the tutorial, the normal startup message for DDS should look like this: cf_axi_dds 79024000.cf-ad9361-dds-core-lpc: Analog Devices CF_AXI_DDS_DDS master (8.00.b) at 0x79024000 mapped to 0xf0998000, probed DDS AD9361
But in my case, it appears as follows: cf_axi_dds 44a04000.jesd204-transport-layer: Analog Devices CF_AXI_DDS_DDS master (9.01.b) at 0x44A04000 mapped to 0x(ptrval), probed DDS (null)
Therefore, I believe this discrepancy might be the cause of the issue.What steps should I take to resolve this issue?
Additionally, I would like to know how to modify the parameters of the JESD204B link. For example, I would like to set the sampling rate of the AD9136 to 2 GSPS and change the external input reference clock to 250 MHz. Can this be easily configured without modifying the device tree file?
Thank you very much for your assistance.
root@analog:~# dmesg | grep jesd [ 0.280180] jesd204: created con: id=0, topo=0, link=0, /fpga-axi@0/jesd204-phy@44a60000 <-> /fpga-axi@0/jesd204-link-layer@44a90000 [ 0.290816] jesd204: created con: id=1, topo=0, link=0, /fpga-axi@0/jesd204-link-layer@44a90000 <-> /fpga-axi@0/jesd204-transport-layer@44a04000 [ 0.302494] jesd204: created con: id=2, topo=0, link=0, /fpga-axi@0/jesd204-transport-layer@44a04000 <-> /axi/spi@e0006000/dac@1 [ 0.312785] jesd204: /axi/spi@e0006000/dac@1: JESD204[0:0] transition uninitialized -> initialized [ 0.320441] jesd204: found 4 devices and 1 topologies [ 1.256420] axi_adxcvr 44a60000.jesd204-phy: AXI-ADXCVR-TX (17.05.a) using QPLL on GTX2 at 0x44A60000. Number of lanes: 8. [ 1.267116] axi-jesd204-tx 44a90000.jesd204-link-layer: AXI-JESD204-TX (1.06.a) at 0x44A90000. Encoder 8b10b, width 4/4, lanes 8, jesd204-fsm. [ 1.393115] jesd204: /axi/spi@e0006000/dac@1,jesd204:0,parent=spi0.1: JESD204[0:0] transition initialized -> probed [ 1.402261] jesd204: /axi/spi@e0006000/dac@1,jesd204:0,parent=spi0.1: JESD204[0:0] transition probed -> idle [ 1.410825] jesd204: /axi/spi@e0006000/dac@1,jesd204:0,parent=spi0.1: JESD204[0:0] transition idle -> device_init [ 1.419810] jesd204: /axi/spi@e0006000/dac@1,jesd204:0,parent=spi0.1: JESD204[0:0] transition device_init -> link_init [ 1.429226] jesd204: /axi/spi@e0006000/dac@1,jesd204:0,parent=spi0.1: JESD204[0:0] transition link_init -> link_supported [ 1.438916] jesd204: /axi/spi@e0006000/dac@1,jesd204:0,parent=spi0.1: JESD204[0:0] transition link_supported -> link_pre_setup [ 1.449023] jesd204: /axi/spi@e0006000/dac@1,jesd204:0,parent=spi0.1: JESD204[0:0] transition link_pre_setup -> clk_sync_stage1 [ 1.459220] jesd204: /axi/spi@e0006000/dac@1,jesd204:0,parent=spi0.1: JESD204[0:0] transition clk_sync_stage1 -> clk_sync_stage2 [ 1.469498] jesd204: /axi/spi@e0006000/dac@1,jesd204:0,parent=spi0.1: JESD204[0:0] transition clk_sync_stage2 -> clk_sync_stage3 [ 1.521771] jesd204: /axi/spi@e0006000/dac@1,jesd204:0,parent=spi0.1: JESD204[0:0] transition clk_sync_stage3 -> link_setup [ 1.531630] jesd204: /axi/spi@e0006000/dac@1,jesd204:0,parent=spi0.1: JESD204[0:0] transition link_setup -> opt_setup_stage1 [ 1.541567] jesd204: /axi/spi@e0006000/dac@1,jesd204:0,parent=spi0.1: JESD204[0:0] transition opt_setup_stage1 -> opt_setup_stage2 [ 1.552018] jesd204: /axi/spi@e0006000/dac@1,jesd204:0,parent=spi0.1: JESD204[0:0] transition opt_setup_stage2 -> opt_setup_stage3 [ 1.562468] jesd204: /axi/spi@e0006000/dac@1,jesd204:0,parent=spi0.1: JESD204[0:0] transition opt_setup_stage3 -> opt_setup_stage4 [ 1.572928] jesd204: /axi/spi@e0006000/dac@1,jesd204:0,parent=spi0.1: JESD204[0:0] transition opt_setup_stage4 -> opt_setup_stage5 [ 1.583380] jesd204: /axi/spi@e0006000/dac@1,jesd204:0,parent=spi0.1: JESD204[0:0] transition opt_setup_stage5 -> clocks_enable [ 1.593648] jesd204: /axi/spi@e0006000/dac@1,jesd204:0,parent=spi0.1: JESD204[0:0] transition clocks_enable -> link_enable [ 1.651875] jesd204: /axi/spi@e0006000/dac@1,jesd204:0,parent=spi0.1: JESD204[0:0] transition link_enable -> link_running [ 1.661545] jesd204: /axi/spi@e0006000/dac@1,jesd204:0,parent=spi0.1: JESD204[0:0] transition link_running -> opt_post_running_stage [ 1.672175] cf_axi_dds 44a04000.jesd204-transport-layer: Analog Devices CF_AXI_DDS_DDS MASTER (9.01.b) at 0x44A04000 mapped to 0x(ptrval), probed DDS (null) root@analog:~# dmesg | grep 9144 [ 1.632875] ad9144 spi0.1: Link0 code grp sync: ff [ 1.636360] ad9144 spi0.1: Link0 frame sync stat: ff [ 1.640014] ad9144 spi0.1: Link0 good checksum stat: ff [ 1.643948] ad9144 spi0.1: Link0 init lane_sync stat: ff [ 1.647949] ad9144 spi0.1: Link0 8 lanes @ 3500000 kBps root@analog:~# jesd204_status -bash: jesd204_status: command not found root@analog:~# jesd_status ┌──────────────────────────────────────────────────────────────────────────────┐ │┌(DEVICES) Found 1 JESD204 Link Layer peripherals────────────────────────────┐│ ││ ││ ││(0): axi-jesd204-tx/44a90000.jesd204-link-layer [*] ││ │└────────────────────────────────────────────────────────────────────────────┘│ │┌(STATUS)────────────────────────────────────────────────────────────────────┐│ ││Link is enabled ││ ││Link Status DATA ││ ││Measured Link Clock (MHz) 87.502 ││ ││Reported Link Clock (MHz) 87.500 ││ ││Measured Device Clock (MHz) 87.502 ││ ││Reported Device Clock (MHz) 87.500 ││ ││Desired Device Clock (MHz) 87.500 ││ ││Lane rate (MHz) 3500.000 ││ ││Lane rate / 40 (MHz) 87.500 ││ ││LMFC rate (MHz) 10.937 ││ ││SYSREF captured Yes ││ ││SYSREF alignment error No ││ ││SYNC~ deasserted ││ │└────────────────────────────────────────────────────────────────────────────┘│ │ │ │You can also use 'q' to quit and 'a' or 'd' to move between devices! │ │F1axi-jesd204-tx/44a90000.jesd204-link-layerF9Quit │ └──────────────────────────────────────────────────────────────────────────────┘