AD738x Driver and SPI Engine

Question

I am still trying to understand how IIO interacts with the axi-spi-engine platform driver and the ad738x SPI device driver after reading the SPI Engine overview on the Wiki . 
 The AD738x dual ADC driver at https://github.com/analogdevicesinc/linux/blob/master/drivers/iio/adc/ad738x.c configures the AD738x for 1-wire mode in ad738x_probe(). For my application I would like to configure the device to read conversions in 2-wire mode, and I'm trying to understand what changes are necessary to this driver, as well as the axi-spi-engine, offload, and spi execution HDL components. 
 If I instead run the AD7380 in 1-wire mode, is it correct that I need to configure the axi-spi-engine, offload, and spi execution components for 1 MISO line? I currently have them configured with 2 MISO lines. 
 I read here that the AD7380 driver is not written for support of the offload engine. What needs to be added to support this? I thought that the offload engine just queues up messages for the execution engine. Or was that thread referring to DMA offload rather than the offload HDL component? 
 Note: I am currently running the 5.4 linux-xlnx kernel 2020.1, and I have enabled support for the axi-spi-engine and dmac in the kernel. The ad738x.c driver code is from the master branch.

nsa · Accepted Answer

Hi, 
 ddickerhoof said: A new question directly related to this is, do I need to set CONFIG_IIO_BUFFER_CB and/or CONFIG_IIO_BUFFER_HW_CONSUMER in the kernel configuration in order to support the SPI Engine/DMA for streaming? 
 No, I do not think so. Those drivers are interfaces for in-kernel drivers that need to access IIO devices so they can read/write some channels (typically that is done from userspace). 
 ddickerhoof said: I'm not sure if the ADI AXI-DMAC is the hardware buffering 
 That is the driver for our DMA IP controller that is implemented in HDL... You'll need that enabled. The IIO buffering is done by this one . 
 ddickerhoof said: For my application I would like to configure the device to read conversions in 2-wire mode, and I'm trying to understand what changes are necessary to this driver, as well as the axi-spi-engine, offload, and spi execution HDL components. 
 I cannot say what you'll need to change in the hdl but you'll have to instruct the offload engine about the word (in the spi_transfer) to read (it should be half the bytes as you have two lines). 
 
 ddickerhoof said: I was looking at the ad400x driver for inspiration, but ran into some API differences. 
 Try to have a look to this one (also supports different number of spi lines) and to the device tree in here ... 
 
 Hope this helps! 
 - Nuno S&aacute;)

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AD738x Driver and SPI Engine