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AD738x Driver and SPI Engine

Thread Summary

The user is trying to configure the AD738x dual ADC driver to use 2-wire mode and understand the necessary changes to the driver and SPI Engine components. The final answer indicates that the SPI Engine offload engine needs to be instructed to read half the bytes for 2 MISO lines. The user also needs to enable the IIO buffering driver for DMA support, and the AD4630 driver is suggested as a reference for handling different SPI line configurations.
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Category: Software

I am still trying to understand how IIO interacts with the axi-spi-engine platform driver and the ad738x SPI device driver after reading the SPI Engine overview on the Wiki.

The AD738x dual ADC driver at https://github.com/analogdevicesinc/linux/blob/master/drivers/iio/adc/ad738x.c configures the AD738x for 1-wire mode in ad738x_probe().  For my application I would like to configure the device to read conversions in 2-wire mode, and I'm trying to understand what changes are necessary to this driver, as well as the axi-spi-engine, offload, and spi execution HDL components.

If I instead run the AD7380 in 1-wire mode, is it correct that I need to configure the axi-spi-engine, offload, and spi execution components for 1 MISO line?  I currently have them configured with 2 MISO lines.

I read here that the AD7380 driver is not written for support of the offload engine.  What needs to be added to support this? I thought that the offload engine just queues up messages for the execution engine.  Or was that thread referring to DMA offload rather than the offload HDL component?

Note: I am currently running the 5.4 linux-xlnx kernel 2020.1, and  I have enabled support for the axi-spi-engine and dmac in the kernel.  The ad738x.c driver code is from the master branch.

Edit Notes

Clarified
[edited by: ddickerhoof at 12:26 PM (GMT -5) on 18 Jan 2023]
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