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AD738x Linux Driver and Device Tree

Category: Software
Product Number: AD738x
Software Version: N/A

I am trying to understand the AD7380 Linux driver and device tree documented at

We have a Xilinx UltraScale design implemented based on the FMC evaluation card HDL with DMA, i2c, and SPI on an AXI bus.  The Linux image is built with PetaLinux, and includes libiio, libiio-tests, and libiio-iiod.  The DMA controller, i2c interface and spi_engine are in the device tree based on the HDL design.

I actually have a few questions:

  1. How does the device tree fragment shown connect to a particular SPI interface in the device tree? 
  2. It looks like the driver at will need to be modified to take advantage of DMA.  Is the driver for the AD4020 a good example of the code that needs to be incorporated into the AD738x IIO driver to support high speed operation with the offloading engine?
  3. Are there #include statements that need to go before this device tree fragment to pull in definitions?
  • I see now that I am supposed to put an rx_dma node (adi,axi-dmac-1.00.a) in the device tree that has a dma-channel as a sub-node.  Then, the axi_spi_engine (adi,axi-spi-engine-1.00.a) is another device tree node, and the SPI device is a sub-node there.

    However, in order to do this, I have to refer to the Zynq UltraScale+ clocks and interrupts.  The clocks are the pl_clk0 and pl_clk1 of the Zynq block, and the interrupts are pl_ps_irq0 and pl_ps_irq1.  But I can't figure out where the device tree bindings are documented. 

    As a guess, I think the interrupts may be on the "arm,gic-400".  Even if so, I don't understand the "interrupts = <x y z>" notation.

    Another guess that the pl_clks are fclks?

  • I believe that I have the device tree in order after finding:

    #include <dt-bindings/dma/axi-dmac.h>

    #include <dt-bindings/clock/xlnx-zynqmp-clk.h>

    UG1085 and /kernel-source/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
    #include <dt-bindings/interrupt-controller/arm-gic.h>