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AD9361: Unhandled case in ad9361_tx_quad_calib

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Product Number: ADRV9364
Software Version: Git latest

Our application has a lower RX rate requirement than that for TX. We Monitor RX at a rate of 4 MSPS and when required to transmit, the rate is changed to accommodate TX requirement (4 MSPS to 60000 MSPS) as required. When required to cease transmission, the baseband rate is set to the minimum RX rate of 4 MSPS to save power. On a handful of occasions we have found that an ADRV9364 will not transmit IQ data until the system is rebooted. We have not attempted to cycle the AD9364 ensm_mode to any other states and then back to fdd to see if that resolves the issue largely because we are not able to duplicate it easily and we have no way of knowing when TX channel is non responsive. When TX channel is in this state, no matter what IQ data is sent to the TX channel, the output is a CW. We also see the following kernel messages:

[ 2652.175472] ad9361 spi3.0: Unhandled case in ad9361_tx_quad_calib line 2889 clkrf 3999999 clktf 15999999
[ 2652.213479] ad9361 spi3.0: Unhandled case in ad9361_tx_quad_calib line 2889 clkrf 3999999 clktf 15999999
[ 2652.937384] ad9361 spi3.0: Unhandled case in ad9361_tx_quad_calib line 2889 clkrf 3999999 clktf 15999999
[ 2712.005104] ad9361 spi3.0: Unhandled case in ad9361_tx_quad_calib line 2889 clkrf 3999999 clktf 15999999
[ 2712.042263] ad9361 spi3.0: Unhandled case in ad9361_tx_quad_calib line 2889 clkrf 3999999 clktf 15999999
[ 2712.813428] ad9361 spi3.0: Unhandled case in ad9361_tx_quad_calib line 2889 clkrf 3999999 clktf 15999999

We understand the message from looking at https://github.com/analogdevicesinc/linux/blob/master/drivers/iio/adc/ad9361.c#L2889 but have not idea how clkrf and clktf are selected such that the code ends up in a case that is not handled. And frankly, not sure that would necessarily cause the problem we are experiencing.

Next time the issues occurs, I'll try changing the rate and ensm mode. Any ideas to help us resolve this issue are welcome.



Fix language
[edited by: EdwardK at 5:30 PM (GMT -4) on 5 Oct 2022]

Top Replies

    •  Analog Employees 
    Oct 7, 2022 in reply to EdwardK +1 verified
    Looks like AD9361 Filter Design Wizard creates a filter with parameters that trigger the issue?

    Not directly - but let me explain.

    The RXSAMP and TXSAMP rate must always be equal. In case you…

Parents
  • Wondering do you have a FIR filter loaded with some interpolation or decimation?

    There is only one application controlling the IIO device? Right?

    Can you share more information about this use case?

    I don't think I ever come across something close. 

    -Michael

  • Please also share your kernel version (git hash) architecture you run on, etc.

    Git diff against our kernel etc. 

    The rates are propagated via the kernel common clock framework. And there seems to be some issue there.

    In theory this should be fully locked also we have MUTEXes on all the user controls.

    Maybe a SPI issue - since the dividers are fetched from HW - what clock SPI clock your running on?

    -Michael

Reply
  • Please also share your kernel version (git hash) architecture you run on, etc.

    Git diff against our kernel etc. 

    The rates are propagated via the kernel common clock framework. And there seems to be some issue there.

    In theory this should be fully locked also we have MUTEXes on all the user controls.

    Maybe a SPI issue - since the dividers are fetched from HW - what clock SPI clock your running on?

    -Michael

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