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axi_adxcvr tx error : 0

Category: Software


In one of our Zynq ultrascale+MPSoC custom board, 

Following error was encountered during initialization of ad9371. 

[    9.661485] axi_adxcvr 80090000.axi_adxcvr: TX Error: 0
[    9.666706] ad9371 spi1.0: jesd_tx_clk enable failed (-5)

The version of AXI-ADXCVR-TX  being used is as below:

axi_adxcvr 80100000.axi_adxcvr: AXI-ADXCVR-TX (17.01.a) using GTH4 at 0x80100000 mapped to 0xffffff800ade0000. Number of lanes: 4.

Following is the code snippet of TX error

What are the possible reasons for this error.

adxcvr_status_error()  is called in adxcvr_reset().adxcvr_reset() in turn is called in adxcvr_clk_enable(). When is adxcvr_clk_enable() is called?

Thanks and Regards