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How to Move Serial Console TTY from UART1 to UART0 on ADRV9364-Z7020 and ADRV9364-Z7020?

Hello,

I have enabled uart0 on both the z7020 and z7035 as UART0 with MIO46 (RX) and MIO47 (TX), and UART1 with MIO49 (RX) and MIO48 (TX) by making the following changes to in the devicetree by modifying zynq.dtsi from the Linux repo (github.com/.../linux.git) on branch 2019_R2:

diff --git a/arch/arm/boot/dts/zynq.dtsi b/arch/arm/boot/dts/zynq.dtsi
index 465f00e21edd..9a23ce9c4d40 100644
--- a/arch/arm/boot/dts/zynq.dtsi
+++ b/arch/arm/boot/dts/zynq.dtsi
@@ -6,7 +6,8 @@
 
 	aliases: aliases {
 		ethernet0 = &gem0;
-		serial0 = &uart1;
+		serial0 = &uart0;
+		serial1 = &uart1;
 	};
 };
 
@@ -20,7 +21,11 @@
 
 &usb0 {
 	status = "okay";
-	dr_mode = "host"; /* This breaks OTG mode */
+	dr_mode = "otg";
+};
+
+&uart0 {
+	status = "okay";
 };
 
 &uart1 {
@@ -30,3 +35,51 @@
 &sdhci0 {
 	status = "okay";
 };
+
+&pinctrl0 {
+	pinctrl_uart0_default: uart0-default {
+		mux {
+			groups = "uart0_9_grp";
+			function = "uart0";
+		};
+
+		conf {
+			groups = "uart0_9_grp";
+			slew-rate = <0>;
+			io-standard = <1>;
+		};
+
+		conf-rx {
+			pins = "MIO46";
+			bias-high-impedance;
+		};
+
+		conf-tx {
+			pins = "MIO47";
+			bias-disable;
+		};
+	};
+
+	pinctrl_uart1_default: uart1-default {
+		mux {
+			groups = "uart1_10_grp";
+			function = "uart1";
+		};
+
+		conf {
+			groups = "uart1_10_grp";
+			slew-rate = <0>;
+			io-standard = <1>;
+		};
+
+		conf-rx {
+			pins = "MIO49";
+			bias-high-impedance;
+		};
+
+		conf-tx {
+			pins = "MIO48";
+			bias-disable;
+		};
+	};
+};

I have verified that UART0 is indeed enabled (along with UART1), as well as UART0 now being on ttyPS0, via dmesg:

root@analog:~# dmesg -T | grep uart
[Sat Jan 15 11:16:55 2022] e0000000.serial: ttyPS0 at MMIO 0xe0000000 (irq = 27, base_baud = 6249999) is a xuartps
[Sat Jan 15 11:16:55 2022] e0001000.serial: ttyPS1 at MMIO 0xe0001000 (irq = 28, base_baud = 6249999) is a xuartps
root@analog:~# dmesg -T | grep tty
[Sat Jan 15 11:16:55 2022] Kernel command line: console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait
[Sat Jan 15 11:16:55 2022] e0000000.serial: ttyPS0 at MMIO 0xe0000000 (irq = 27, base_baud = 6249999) is a xuartps
[Sat Jan 15 11:16:55 2022] console [ttyPS0] enabled
[Sat Jan 15 11:16:55 2022] e0001000.serial: ttyPS1 at MMIO 0xe0001000 (irq = 28, base_baud = 6249999) is a xuartps
root@analog:~# 


However, my problem is that I cannot get a serial console open on uart0/e0000000 on ttyPS0.  How do I move the serial console tty from the default of uart1 to uart0 using the device tree? Is there anything I am missing in the kernel or the devicetree?

Parents
  • Hi,

    How does your u-boot bootargs variable look like? Its value is passed to the Linux kernel.

    Thanks,
    Dragos

  • Hi all,

    I was able to figure it out.  I used https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/1452114088/Zynq+Linux+Pin+Controller+Driver#Devicetree as a guide.  

    Note that the following from my original post was an accident and not needed:

    &usb0 {
    status = "okay";
    - dr_mode = "host"; /* This breaks OTG mode */
    + dr_mode = "otg";
    +};

    Also note that the serial tty terminal will be assigned to whichever UART is assigned to serial0.


    Following is the diff for the changes needed in ./arch/arm/boot/dts/zynq.dtsi on branch 2019_R2:

    diff --git a/arch/arm/boot/dts/zynq.dtsi b/arch/arm/boot/dts/zynq.dtsi
    index 465f00e21edd..0ae7dc47711e 100644
    --- a/arch/arm/boot/dts/zynq.dtsi
    +++ b/arch/arm/boot/dts/zynq.dtsi
    @@ -6,7 +6,8 @@
     
     	aliases: aliases {
     		ethernet0 = &gem0;
    -		serial0 = &uart1;
    +		serial0 = &uart0;
    +		serial1 = &uart1;
     	};
     };
     
    @@ -23,10 +24,66 @@
     	dr_mode = "host"; /* This breaks OTG mode */
     };
     
    +&uart0 {
    +	status = "okay";
    +	pinctrl-names = "default";
    +	pinctrl-0 = <&pinctrl_uart0_default>;
    +};
    +
     &uart1 {
     	status = "okay";
    +	pinctrl-names = "default";
    +	pinctrl-0 = <&pinctrl_uart1_default>;
     };
     
     &sdhci0 {
     	status = "okay";
     };
    +
    +&pinctrl0 {
    +	pinctrl_uart0_default: uart0-default {
    +		mux {
    +			groups = "uart0_9_grp";
    +			function = "uart0";
    +		};
    +
    +		conf {
    +			groups = "uart0_9_grp";
    +			slew-rate = <0>;
    +			io-standard = <1>;
    +		};
    +
    +		conf-rx {
    +			pins = "MIO46";
    +			bias-high-impedance;
    +		};
    +
    +		conf-tx {
    +			pins = "MIO47";
    +			bias-disable;
    +		};
    +	};
    +
    +	pinctrl_uart1_default: uart1-default {
    +		mux {
    +			groups = "uart1_10_grp";
    +			function = "uart1";
    +		};
    +
    +		conf {
    +			groups = "uart1_10_grp";
    +			slew-rate = <0>;
    +			io-standard = <1>;
    +		};
    +
    +		conf-rx {
    +			pins = "MIO49";
    +			bias-high-impedance;
    +		};
    +
    +		conf-tx {
    +			pins = "MIO48";
    +			bias-disable;
    +		};
    +	};
    +};
    


    Micah

Reply
  • Hi all,

    I was able to figure it out.  I used https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/1452114088/Zynq+Linux+Pin+Controller+Driver#Devicetree as a guide.  

    Note that the following from my original post was an accident and not needed:

    &usb0 {
    status = "okay";
    - dr_mode = "host"; /* This breaks OTG mode */
    + dr_mode = "otg";
    +};

    Also note that the serial tty terminal will be assigned to whichever UART is assigned to serial0.


    Following is the diff for the changes needed in ./arch/arm/boot/dts/zynq.dtsi on branch 2019_R2:

    diff --git a/arch/arm/boot/dts/zynq.dtsi b/arch/arm/boot/dts/zynq.dtsi
    index 465f00e21edd..0ae7dc47711e 100644
    --- a/arch/arm/boot/dts/zynq.dtsi
    +++ b/arch/arm/boot/dts/zynq.dtsi
    @@ -6,7 +6,8 @@
     
     	aliases: aliases {
     		ethernet0 = &gem0;
    -		serial0 = &uart1;
    +		serial0 = &uart0;
    +		serial1 = &uart1;
     	};
     };
     
    @@ -23,10 +24,66 @@
     	dr_mode = "host"; /* This breaks OTG mode */
     };
     
    +&uart0 {
    +	status = "okay";
    +	pinctrl-names = "default";
    +	pinctrl-0 = <&pinctrl_uart0_default>;
    +};
    +
     &uart1 {
     	status = "okay";
    +	pinctrl-names = "default";
    +	pinctrl-0 = <&pinctrl_uart1_default>;
     };
     
     &sdhci0 {
     	status = "okay";
     };
    +
    +&pinctrl0 {
    +	pinctrl_uart0_default: uart0-default {
    +		mux {
    +			groups = "uart0_9_grp";
    +			function = "uart0";
    +		};
    +
    +		conf {
    +			groups = "uart0_9_grp";
    +			slew-rate = <0>;
    +			io-standard = <1>;
    +		};
    +
    +		conf-rx {
    +			pins = "MIO46";
    +			bias-high-impedance;
    +		};
    +
    +		conf-tx {
    +			pins = "MIO47";
    +			bias-disable;
    +		};
    +	};
    +
    +	pinctrl_uart1_default: uart1-default {
    +		mux {
    +			groups = "uart1_10_grp";
    +			function = "uart1";
    +		};
    +
    +		conf {
    +			groups = "uart1_10_grp";
    +			slew-rate = <0>;
    +			io-standard = <1>;
    +		};
    +
    +		conf-rx {
    +			pins = "MIO49";
    +			bias-high-impedance;
    +		};
    +
    +		conf-tx {
    +			pins = "MIO48";
    +			bias-disable;
    +		};
    +	};
    +};
    


    Micah

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