we are trying to bringup ADRV9002FMCZ using linux system and IIOSCOPE using CMOS interface
profile loading for 1lane CMOS is working fine and we are able to get a sine wave on IIOSCOPE using DDS input through RX-TX loopback in ADRV9002.
But when we are trying to load profile for 4-Lane CMOS we are getting sine wave with distortion/glitches with same loopback configuration. we teste this with other signal like ramp nibble and getting same distortion/glitches. Also while profile loading we getting "ramp nibble", "strobe error", "data error" which we then bypassed
Also we tried to bringup with baremetal no-OS driver from ADi, in this for both 1lane and 4lane we are not getting a correct data in either of the mode and getting "data_error"
Kindly guide us some solution on it or are we missing any configuration.
Also can you share link for latest HDL/ linux code branch for ADRV9002 for us to cross validate.