change ref clk in adrv9361-z7035

Hello,

I am using adrv9361-z7035 and change the internal clock in your devicetree

to an external one of 26 MHz and frecuency accuracy 1ppm.

Changes made:

clocks {

        clock@0 {
            #clock-cells = <0x00>;
            compatible = "adjustable-clock";
        clock-frequency = <0x18cba80>;
        clock-accuracy = <0x1a>;
        clock-output-names = "TCXO_26MHz";
            linux,phandle = <0x0b>;
            phandle = <0x0b>;
        };

        clock@2 {
            #clock-cells = <0x00>;
            compatible = "fixed-clock";
            clock-frequency = <0x16e3600>;
            clock-output-names = "24MHz";
            linux,phandle = <0x0c>;
            phandle = <0x0c>;
        };

        clock@3 {
            #clock-cells = <0x00>;
            compatible = "fixed-clock";
            clock-frequency = <0x17d7840>;
            clock-output-names = "ad9517_refclk";
            linux,phandle = <0x07>;
            phandle = <0x07>;
        };

        audio_clock {
            compatible = "fixed-clock";
            #clock-cells = <0x00>;
            clock-frequency = <0xbb8000>;
            linux,phandle = <0x0e>;
            phandle = <0x0e>;
        };
    };

    ad9361-refclk-gpio-gate@0 {
        #clock-cells = <0x00>;
        compatible = "gpio-gate-clock";
        clocks = <0x0b>;
       enable-gpios = <0x06 0x69 0x01>;
        clk-set-rate-parent-enable;
        clock-output-names = "ad9361_ext_refclk";
        linux,phandle = <0x05>;
        phandle = <0x05>;
    };

First I would like to know if this change is correct.

Second, I would like to know how I can confirm that my board is using the new oscillator. I use Linux.


Thanks a lot,
Nicole.

Parents Reply Children
  • 0
    •  Analog Employees 
    on Sep 8, 2021 10:13 AM in reply to NicoleDuarte

    ok - I tested the entire process here:

    1. Modified the dts source file
    2. Rebuild the dtb
    3. Copied to the SD card 

    michael@mhenneri-D06:~/devel/hdl/github-linux-build/linux$ git diff
    diff --git a/arch/arm/boot/dts/zynq-adrv9361-z7035.dtsi b/arch/arm/boot/dts/zynq-adrv9361-z7035.dtsi
    index 48ad6894b65a..215e4fb60d3b 100644
    --- a/arch/arm/boot/dts/zynq-adrv9361-z7035.dtsi
    +++ b/arch/arm/boot/dts/zynq-adrv9361-z7035.dtsi
    @@ -23,10 +23,10 @@
            clocks {
                    xo_40mhz_fixed_clk: clock@0 {
                            #clock-cells = <0>;
    -                       compatible = "adjustable-clock";
    -                       clock-frequency = <40000000>;
    +                       compatible = "fixed-clock";
    +                       clock-frequency = <39999123>;
                            clock-accuracy = <200000>; /* 200 ppm (ppb) */
    -                       clock-output-names = "XO_40MHz";
    +                       clock-output-names = "XO_39p999123MHz";
                    };
     
                    usb_ulpi_fixed_clk: clock@2 {
    
    michael@mhenneri-D06:~/devel/hdl/github-linux-build/linux$ make zynq-adrv9361-z7035-fmc.dtb
      DTC     arch/arm/boot/dts/zynq-adrv9361-z7035-fmc.dtb
    
    michael@mhenneri-D06:~/devel/hdl/github-linux-build/linux$ cp arch/arm/boot/dts/zynq-adrv9361-z7035-fmc.dtb /media/michael/BOOT/devicetree.dtb 
    
    

    After the board booted - I can see both - the name and frequency change

    root@analog:~# cat /sys/kernel/debug/clk/clk_summary 
                                     enable  prepare  protect                                duty
       clock                          count    count    count        rate   accuracy phase  cycle
    ---------------------------------------------------------------------------------------------
     spi0.0-tx_lo_dummy                   0        0        0  1225000000          0     0  50000
     spi0.0-rx_lo_dummy                   0        0        0  1200000000          0     0  50000
     audio_clock                          1        1        0    12288000          0     0  50000
     ad9517_refclk                        0        0        0    25000000          0     0  50000
     24MHz                                0        0        0    24000000          0     0  50000
        usb-ulpe-gpio-gate                0        0        0    24000000          0     0  50000
     XO_39p999123MHz                      1        1        0    39999123     200000     0  50000
        ad9361-refclk-gpio-gate           4        4        0    39999123     200000     0  50000
           spi0.0-bb_refclk               1        1        0    39999123     200000     0  50000
              spi0.0-bbpll_clk            1        1        0   983040008     200000     0  50000
                 spi0.0-adc_clk           1        1        0   245760002     200000     0  50000
                    spi0.0-dac_clk        1        1        0   122880001     200000     0  50000
                       spi0.0-t2_clk       1        1        0   122880001     200000     0  50000
                          spi0.0-t1_clk       1        1        0    61440000     200000     0  50000
                             spi0.0-clktf_clk       1        1        0    30720000     200000     0  50000
                                spi0.0-tx_sampl_clk       1        1        0    30720000     200000     0  50000
                    spi0.0-r2_clk         0        0        0   122880001     200000     0  50000
                       spi0.0-r1_clk       0        0        0    61440000     200000     0  50000
                          spi0.0-clkrf_clk       0        0        0    30720000     200000     0  50000
                             spi0.0-rx_sampl_clk       0        0        0    30720000     200000     0  50000
           spi0.0-rx_refclk               1        1        0    79998246     200000     0  50000
              spi0.0-rx_rfpll_int         1        1        0  1200000000     200000     0  50000
                 spi0.0-rx_rfpll          1        1        0  1200000000     200000     0  50000
           spi0.0-tx_refclk               1        1        0    79998246     200000     0  50000
              spi0.0-tx_rfpll_int         1        1        0  1224999999     200000     0  50000
                 spi0.0-tx_rfpll          1        1        0  1224999999     200000     0  50000
    

    Can you try to do the same on your end?

    -Michael

  • What is highlighted are the changes I made by following this link:

    https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms2-ebz/software/linux/zynq_tips_tricks

         clock@0 {

        #clock-cells = <0x00>;

        compatible = "adjustable-clock";

        clock-frequency = <0x18cba80>;

        clock-accuracy = <0x1a>;

        clock-output-names = "TCXO_26MHz";

        phandle = <0x0b>;

        };

    ad9361-refclk-gpio-gate@0 {

        #clock-cells = <0x00>;

        compatible = "gpio-gate-clock";

        clocks = <0x0b>;

        enable-gpios = <0x06 0x69 0x01>;

        clock-output-names = "ad9361_ext_refclk";

        phandle = <0x05>;

        };

    Then I access my board and with cat / sys / kernel / debug / clk / clk_summary and the following appears:


    It is seen that the accuracy changes to 26 Hz and the name of the clock from OX_40MHz to TCXO_26MHz, but the value of the frequency does not change, the same frequency that appears when initializing the iio oscilloscope appears, the frequency of the internal clock. Could it be that something is changing the frequency?

    Thanks,
    Nicole.

  • 0
    •  Analog Employees 
    on Sep 8, 2021 2:58 PM in reply to NicoleDuarte

    My guess is that OSC changes the frequency.

    OSC saves settings in a file called .osc_profile.ini which is either under /root or /home/analog

    Can you try to delete both files if they exist?

    I asked you to use 

    compatible = "fixed-clock";

    to prevent this on the lowest level.

    -Michael

  • Regarding a fixed-clock, I used it without getting changes. So I decided to go back to the original settings. I will also leave it as fixed-clock.

    I looked for the .osc_profile.ini file in / home and / home / analog and couldn't find it. Could it be that it does not exist or that it is in some special place?

    Thanks,
    Nicole.

  • 0
    •  Analog Employees 
    on Sep 9, 2021 7:13 AM in reply to NicoleDuarte

    It should either exist in /root or /home/analog.

    Can you try the attached devicetree.dtb - I made your modifications.

    devicetree.zip

    -Michael