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A10SoC+AD9163-FMCC-EBZ Boot/linux problem

Hello All,

I have the following setup: 

HW: A10SoC+AD9163-FMCC-EBZ (Eval-AD916x) 

HDL: AD-DAC-FMC-EBZ 

config.tcl: AD9163 mode:08 (set params(AD9163,08) {2 8 2 1 1 16 16}) 

Linux:

I have used device tree here: https://github.com/analogdevicesinc/linux/blob/master/arch/arm/boot/dts/socfpga_arria10_socdk_ad9136_fmc_ebz.dts

followed the steps from here to build the Kernel and the Device tree https://wiki.analog.com/resources/tools-software/linux-build/generic/socfpga

I have also the  EVAL-AD916X board attached to FMCA connector of the A10SoC.

I have built also the FPGA project in Quartus and generated rbf and put all in the SDcard and booted. 

There are a couple of things I noticed: 

1- It takes considerably long to load the rbf. Are there any options to add during rbf generation?

2- I have two warnings/errors at eh very beginning of the boot messages, in red below, Why would I have those and would this be a problem?

3- I have no device in  sys/bus/iio/devices/ I cannot find a way to communicate with Ad9163 on the eval kit.

Could you please help me to  understand am I missing something or doing something wrong here?

U-Boot 2014.10-00334-gf7a7e26-dirty (Feb 19 2021 - 17:04:19), Build: jenkins-2019_r2-hdl_jobs_for_linux-projects-daq2.a10soc-28

CPU : Altera SOCFPGA Arria 10 Platform
BOARD : Altera SOCFPGA Arria 10 Dev Kit
I2C: ready
DRAM: WARNING: Caches not enabled
SOCFPGA DWMMC: 0
FPGA: writing socfpga_arria10_socdk.rbf ...
Full Configuration Succeeded.
DDRCAL: Success
INFO : Skip relocation as SDRAM is non secure memory
Reserving 2048 Bytes for IRQ stack at: ffe386e8
DRAM : 1 GiB
WARNING: Caches not enabled
MMC: *** Warning - bad CRC, using default environment

In: serial
Out: serial
Err: serial
Model: SOCFPGA Arria10 Dev Kit
Net: dwmac.ff800000
Hit any key to stop autoboot: 0
FPGA must be in Early Release mode to program core.
fpga - loadable FPGA image support

** Unable to read file u-boot.scr **
5111408 bytes read in 233 ms (20.9 MiB/s)
28862 bytes read in 4 ms (6.9 MiB/s)
FPGA BRIDGES: enable
Kernel image @ 0x010000 [ 0x000000 - 0x4dfe70 ]
## Flattened Device Tree blob at 00000100
Booting using the fdt blob at 0x000100
Loading Device Tree to 01ff5000, end 01fff0bd ... OK

Starting kernel ...

Best Regards,

Ömer.

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