How to remove TX Cores in vivado block Design? ( ZC706+ADRV9008-1 )

Hi,

I use ADRV9008-1 with ZC706 EVB. 

The program and code versions used are as follows.

- Vivado / petalinux : 2018.3

- HDL branch  : 2019R1

- meta-adi branch : 2019R1

Boots were successfully verified when using the default block design.

we tried to remove the Tx blocks(xcvr, jesd, tpl core etc..) from the block design. Because ADRV9008-1 does not use the Tx feature.

Bitstream generation and petalinux build were also completed without errors. but When booting, the boot fails with an error.


I referred to the articles, which is an article related to this error in adrv9009_post_setup(). (https://ez.analog.com/linux-software-drivers/f/q-a/162999/adrv9009---rx-only---kernel-panic?ReplySortBy=CreatedDate&ReplySortOrder=Ascending)

But I don't know what to do. Please let me know if I need to modify the block design, modify the device driver(adrv9009_conv), or if there is any other way.

I attach our .dts file and kernel boot log file for refer.

Thanks.

 

4186.bootlog.txt

U-Boot 2018.01 (Feb 08 2021 - 05:43:32 +0000) Xilinx Zynq ZC702

Model: Zynq User Custom Board
Board: Xilinx Zynq
Silicon: v3.1
I2C:   ready
DRAM:  ECC disabled 1 GiB
MMC:   mmc@e0100000: 0 (SD)
Invalid bus 0 (err=-19)
*** Warning - spi_flash_probe_bus_cs() failed, using default environment

In:    serial@e0001000
Out:   serial@e0001000
Err:   serial@e0001000
Model: Zynq User Custom Board
Board: Xilinx Zynq
Silicon: v3.1
Net:   ZYNQ GEM: e000b000, phyaddr 7, interface rgmii-id
eth0: ethernet@e000b000
U-BOOT for peta-portable2

Hit any key to stop autoboot:  0
Device: mmc@e0100000
Manufacturer ID: 74
OEM: 4a60
Name: USD
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 7.5 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
reading image.ub
4718072 bytes read in 277 ms (16.2 MiB/s)
## Loading kernel from FIT Image at 10000000 ...
   Using 'conf@system-top.dtb' configuration
   Verifying Hash Integrity ... OK
   Trying 'kernel@1' kernel subimage
     Description:  Linux kernel
     Type:         Kernel Image
     Compression:  gzip compressed
     Data Start:   0x10000100
     Data Size:    4681161 Bytes = 4.5 MiB
     Architecture: ARM
     OS:           Linux
     Load Address: 0x00008000
     Entry Point:  0x00008000
     Hash algo:    sha1
     Hash value:   b375b0fc74677608848abb5eea36ab934ea70075
   Verifying Hash Integrity ... sha1+ OK
## Loading fdt from FIT Image at 10000000 ...
   Using 'conf@system-top.dtb' configuration
   Trying 'fdt@system-top.dtb' fdt subimage
     Description:  Flattened Device Tree blob
     Type:         Flat Device Tree
     Compression:  uncompressed
     Data Start:   0x10476fcc
     Data Size:    35003 Bytes = 34.2 KiB
     Architecture: ARM
     Hash algo:    sha1
     Hash value:   2422759bdd7a81cd77042b16c81ccbe354156a26
   Verifying Hash Integrity ... sha1+ OK
   Booting using the fdt blob at 0x10476fcc
   Uncompressing Kernel Image ... OK
   Loading Device Tree to 07ff4000, end 07fff8ba ... OK

Starting kernel ...

Booting Linux on physical CPU 0x0
Linux version 4.14.0-xilinx- (oe-user@oe-host) (gcc version 7.3.0 (GCC)) #1 SMP PREEMPT Mon Feb 8 05:55:34 UTC 2021
CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
OF: fdt: Machine model: Zynq User Custom Board
bootconsole [earlycon0] enabled
Memory policy: Data cache writealloc
cma: Reserved 128 MiB at 0x38000000
random: fast init done
percpu: Embedded 16 pages/cpu @ef7c7000 s32972 r8192 d24372 u65536
Built 1 zonelists, mobility grouping on.  Total pages: 260608
Kernel command line: console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait
PID hash table entries: 4096 (order: 2, 16384 bytes)
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Memory: 897012K/1048576K available (6144K kernel code, 334K rwdata, 2812K rodata, 1024K init, 153K bss, 20492K reserved, 131072K cma-reserved, 131072K highmem)
Virtual kernel memory layout:
    vector  : 0xffff0000 - 0xffff1000   (   4 kB)
    fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
    vmalloc : 0xf0800000 - 0xff800000   ( 240 MB)
    lowmem  : 0xc0000000 - 0xf0000000   ( 768 MB)
    pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
    modules : 0xbf000000 - 0xbfe00000   (  14 MB)
      .text : 0xc0008000 - 0xc0700000   (7136 kB)
      .init : 0xc0a00000 - 0xc0b00000   (1024 kB)
      .data : 0xc0b00000 - 0xc0b538c0   ( 335 kB)
       .bss : 0xc0b58e34 - 0xc0b7f494   ( 154 kB)
Preemptible hierarchical RCU implementation.
        RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
        Tasks RCU enabled.
RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
efuse mapped to f0802000
slcr mapped to f0804000
L2C: platform modifies aux control register: 0x72360000 -> 0x72760000
L2C: DT/platform modifies aux control register: 0x72360000 -> 0x72760000
L2C-310 erratum 769419 enabled
L2C-310 enabling early BRESP for Cortex-A9
L2C-310 full line of zeros enabled for Cortex-A9
L2C-310 ID prefetch enabled, offset 1 lines
L2C-310 dynamic clock gating enabled, standby mode enabled
L2C-310 cache controller enabled, 8 ways, 512 kB
L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x76760001
zynq_clock_init: clkc starts at f0804100
Zynq clock init
sched_clock: 64 bits at 333MHz, resolution 3ns, wraps every 4398046511103ns
clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x4ce07af025, max_idle_ns: 440795209040 ns
Switching to timer-based delay loop, resolution 3ns
clocksource: ttc_clocksource: mask: 0xffff max_cycles: 0xffff, max_idle_ns: 537538477 ns
timer #0 at f080c000, irq=17
Console: colour dummy device 80x30
Calibrating delay loop (skipped), value calculated using timer frequency.. 666.66 BogoMIPS (lpj=3333333)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes)
CPU: Testing write buffer coherency: ok
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
Setting up static identity map for 0x100000 - 0x100060
Hierarchical SRCU implementation.
smp: Bringing up secondary CPUs ...
CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
smp: Brought up 1 node, 2 CPUs
SMP: Total of 2 processors activated (1333.33 BogoMIPS).
CPU: All CPU(s) started in SVC mode.
devtmpfs: initialized
VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
futex hash table entries: 512 (order: 3, 32768 bytes)
pinctrl core: initialized pinctrl subsystem
NET: Registered protocol family 16
DMA: preallocated 256 KiB pool for atomic coherent allocations
cpuidle: using governor ladder
hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
hw-breakpoint: maximum watchpoint size is 4 bytes.
zynq-ocm f800c000.ocmc: ZYNQ OCM pool: 256 KiB @ 0xf0880000
zynq-pinctrl 700.pinctrl: zynq pinctrl initialized
e0001000.serial: ttyPS0 at MMIO 0xe0001000 (irq = 26, base_baud = 3125000) is a xuartps
젹?쉽[ttyPS0] enabled
console [ttyPS0] enabled
bootconsole [earlycon0] disabled
bootconsole [earlycon0] disabled
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
media: Linux media interface: v0.10
Linux video capture interface: v2.00
pps_core: LinuxPPS API ver. 1 registered
pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
PTP clock support registered
FPGA manager framework
Advanced Linux Sound Architecture Driver Initialized.
clocksource: Switched to clocksource arm_global_timer
NET: Registered protocol family 2
TCP established hash table entries: 8192 (order: 3, 32768 bytes)
TCP bind hash table entries: 8192 (order: 4, 65536 bytes)
TCP: Hash tables configured (established 8192 bind 8192)
UDP hash table entries: 512 (order: 2, 16384 bytes)
UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
NET: Registered protocol family 1
hw perfevents: no interrupt-affinity property for /pmu@f8891000, guessing.
hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available
workingset: timestamp_bits=30 max_order=18 bucket_order=0
bounce: pool size: 64 pages
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
io scheduler mq-deadline registered
io scheduler kyber registered
dma-pl330 f8003000.dmac: Loaded driver for PL330 DMAC-241330
dma-pl330 f8003000.dmac:        DBUFF-128x8bytes Num_Chans-8 Num_Peri-4 Num_Events-16
brd: module loaded
loop: module loaded
m25p80 spi2.0: found s25fl128s, expected n25q128a11
m25p80 spi2.0: s25fl128s (32768 Kbytes)
5 ofpart partitions found on MTD device spi2.0
Creating 5 MTD partitions on "spi2.0":
0x000000000000-0x000000500000 : "boot"
0x000000500000-0x000000520000 : "bootenv"
0x000000520000-0x000000540000 : "config"
0x000000540000-0x000000fc0000 : "image"
0x000000fc0000-0x000002000000 : "spare"
MACsec IEEE 802.1AE
libphy: Fixed MDIO Bus: probed
tun: Universal TUN/TAP device driver, 1.6
libphy: MACB_mii_bus: probed
macb e000b000.ethernet eth0: Cadence GEM rev 0x00020118 at 0xe000b000 irq 30 (00:0a:35:00:1e:53)
Marvell 88E1116R e000b000.ethernet-ffffffff:07: attached PHY driver [Marvell 88E1116R] (mii_bus:phy_addr=e000b000.ethernet-ffffffff:07, irq=POLL)
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
usbcore: registered new interface driver usb-storage
usbcore: registered new interface driver usbserial
usbcore: registered new interface driver usbserial_generic
usbserial: USB Serial support registered for generic
usbcore: registered new interface driver ftdi_sio
usbserial: USB Serial support registered for FTDI USB Serial Device
chipidea-usb2 e0002000.usb: e0002000.usb supply vbus not found, using dummy regulator
ULPI transceiver vendor/product ID 0x0424/0x0007
Found SMSC USB3320 ULPI transceiver.
ULPI integrity check: passed.
ci_hdrc ci_hdrc.0: EHCI Host Controller
ci_hdrc ci_hdrc.0: new USB bus registered, assigned bus number 1
ci_hdrc ci_hdrc.0: USB 2.0 started, EHCI 1.00
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
i2c /dev entries driver
cdns-i2c e0004000.i2c: 400 kHz mmio e0004000 irq 23
IR NEC protocol handler initialized
IR RC5(x/sz) protocol handler initialized
IR RC6 protocol handler initialized
IR JVC protocol handler initialized
IR Sony protocol handler initialized
IR SANYO protocol handler initialized
IR Sharp protocol handler initialized
IR MCE Keyboard/mouse protocol handler initialized
IR XMP protocol handler initialized
usbcore: registered new interface driver uvcvideo
USB Video Class driver (1.1.1)
gspca_main: v2.14.0 registered
cdns-wdt f8005000.watchdog: Xilinx Watchdog Timer at f0978000 with timeout 10s
Xilinx Zynq CpuIdle Driver started
sdhci: Secure Digital Host Controller Interface driver
sdhci: Copyright(c) Pierre Ossman
sdhci-pltfm: SDHCI platform and OF driver helper
mmc0: SDHCI controller on e0100000.mmc [e0100000.mmc] using ADMA
ledtrig-cpu: registered to indicate activity on CPUs
hidraw: raw HID events driver (C) Jiri Kosina
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
adrv9009 spi0.1: adrv9009_probe : enter
ad9528 spi0.0: spi0.0 supply vcc not found, using dummy regulator
mmc0: new high speed SDHC card at address 59b4
mmcblk0: mmc0:59b4 USD   7.51 GiB
 mmcblk0: p1 p2
axi_adxcvr 44a60000.axi-adxcvr-rx: AXI-ADXCVR-RX (17.01.a) using GTX2 at 0x44A60000 mapped to 0xf0989000. Number of lanes: 2.
fpga_manager fpga0: Xilinx Zynq FPGA Manager registered
NET: Registered protocol family 17
Registering SWP/SWPB emulation handler
adrv9009 spi0.1: adrv9009_probe : enter
adrv9009 spi0.1: ADIHAL_resetHw at index
random: crng init done
adrv9009 spi0.1: adrv9009_probe: adrv9008-1 Rev 192, Firmware 6.0.2 API version: 3.6.0.5 successfully initialized
Unhandled fault: imprecise external abort (0x406) at 0x00000000
pgd = c0004000
[00000000] *pgd=00000000
Internal error: : 406 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 1 PID: 29 Comm: kworker/1:1 Not tainted 4.14.0-xilinx- #1
Hardware name: Xilinx Zynq Platform
Workqueue: events deferred_probe_work_func
task: ef1067c0 task.stack: ef110000
PC is at adrv9009_post_setup+0x40/0xf0
LR is at arm_heavy_mb+0x1c/0x38
pc : [<c058f124>]    lr : [<c0114a18>]    psr: 60000013
sp : ef111de8  ip : ef0d630c  fp : ef0d6160
r10: 00000004  r9 : 00000004  r8 : 00000004
r7 : dec0de1c  r6 : ef0d6000  r5 : 00000000  r4 : f0b98000
r3 : f0b9c048  r2 : 00004048  r1 : 00000000  r0 : ef0d6000
Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
Control: 18c5387d  Table: 0000404a  DAC: 00000051
Process kworker/1:1 (pid: 29, stack limit = 0xef110210)
Stack: (0xef111de8 to 0xef112000)
1de0:                   c058f0e4 ef0d6000 c07db7a4 ef17b200 ee9a5010 ef17c840
1e00: 00000004 00000004 ef0d6160 c0554b18 ee98a268 00000000 00000000 c097a228
1e20: 00000000 c024e890 c097a228 00000000 00000001 c07db644 ef17b210 00000001
1e40: ef7ecf50 ee974c00 c097a228 ee98a268 00000001 ef17b210 ffffffed c0b39c8c
1e60: fffffdfb 00000000 00000000 00000002 c0b78220 c03b014c ef17b210 c0b78220
1e80: c0b78224 c0b39c8c 00000000 c03ae964 00000000 ef111ec8 c03aeabc 00000001
1ea0: 00000000 00000000 c0b58e60 c03acf60 ef075f6c ee9962b8 ef17b210 ef17b244
1ec0: c0b18160 c03ae64c ef17b210 00000001 c0b58ebc ef17b210 ef17b210 c0b18160
1ee0: c0b17f80 c03adc38 ef17b210 c0b17f64 c0b17f64 c03ae084 ef111f3c ffffe000
1f00: ef267fc0 c0b17f88 ef0eba00 ef7de280 ef7e1300 00000000 00000000 00000008
1f20: ef7de280 c0133458 c0b02d00 ef7de298 ef0eba00 ef7de280 ef0eba18 c0b02d00
1f40: ef7de298 ffffe000 00000008 c01343a8 ffffe000 c0b53660 c08f2fc8 00000000
1f60: ffffe000 ef0e7c80 ef0e7cc0 00000000 ef110000 ef0eba00 c0134108 ef06bed8
1f80: ef0e7c9c c0138ec4 00000000 ef0e7cc0 c0138d78 00000000 00000000 00000000
1fa0: 00000000 00000000 00000000 c0107b90 00000000 00000000 00000000 00000000
1fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
1fe0: 00000000 00000000 00000000 00000000 00000013 00000000 5858c681 40943110
[<c058f124>] (adrv9009_post_setup) from [<c0554b18>] (axiadc_probe+0x45c/0x74c)
[<c0554b18>] (axiadc_probe) from [<c03b014c>] (platform_drv_probe+0x50/0xac)
[<c03b014c>] (platform_drv_probe) from [<c03ae964>] (driver_probe_device+0x238/0x2e8)
[<c03ae964>] (driver_probe_device) from [<c03acf60>] (bus_for_each_drv+0x44/0x94)
[<c03acf60>] (bus_for_each_drv) from [<c03ae64c>] (__device_attach+0xb0/0x114)
[<c03ae64c>] (__device_attach) from [<c03adc38>] (bus_probe_device+0x84/0x8c)
[<c03adc38>] (bus_probe_device) from [<c03ae084>] (deferred_probe_work_func+0x50/0x14c)
[<c03ae084>] (deferred_probe_work_func) from [<c0133458>] (process_one_work+0x1d8/0x410)
[<c0133458>] (process_one_work) from [<c01343a8>] (worker_thread+0x2a0/0x598)
[<c01343a8>] (worker_thread) from [<c0138ec4>] (kthread+0x14c/0x154)
[<c0138ec4>] (kthread) from [<c0107b90>] (ret_from_fork+0x14/0x24)
Code: e3042048 e0833002 e5937000 f57ff04f (e5964318)
---[ end trace 755c8a002f1dfe56 ]---
axi-jesd204-rx 44aa0000.axi-jesd204-rx: Lane 1 desynced (71 errors), restarting link


system-top.txt
/dts-v1/;

/ {
	#address-cells = <0x1>;
	#size-cells = <0x1>;
	compatible = "xlnx,zynq-7000";
	interrupt-parent = <0x1>;
	model = "Zynq User Custom Board";

	cpus {
		#address-cells = <0x1>;
		#size-cells = <0x0>;

		cpu@0 {
			compatible = "arm,cortex-a9";
			device_type = "cpu";
			reg = <0x0>;
			clocks = <0x2 0x3>;
			clock-latency = <0x3e8>;
			cpu0-supply = <0x3>;
			operating-points = <0xa2c2a 0xf4240 0x51615 0xf4240>;
		};

		cpu@1 {
			compatible = "arm,cortex-a9";
			device_type = "cpu";
			reg = <0x1>;
			clocks = <0x2 0x3>;
		};
	};

	fpga-full {
		compatible = "fpga-region";
		fpga-mgr = <0x4>;
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges;
	};

	pmu@f8891000 {
		compatible = "arm,cortex-a9-pmu";
		interrupts = <0x0 0x5 0x4 0x0 0x6 0x4>;
		interrupt-parent = <0x1>;
		reg = <0xf8891000 0x1000 0xf8893000 0x1000>;
	};

	fixedregulator {
		compatible = "regulator-fixed";
		regulator-name = "VCCPINT";
		regulator-min-microvolt = <0xf4240>;
		regulator-max-microvolt = <0xf4240>;
		regulator-boot-on;
		regulator-always-on;
		linux,phandle = <0x3>;
		phandle = <0x3>;
	};

	amba {
		u-boot,dm-pre-reloc;
		compatible = "simple-bus";
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		interrupt-parent = <0x1>;
		ranges;

		adc@f8007100 {
			compatible = "xlnx,zynq-xadc-1.00.a";
			reg = <0xf8007100 0x20>;
			interrupts = <0x0 0x7 0x4>;
			interrupt-parent = <0x1>;
			clocks = <0x2 0xc>;
		};

		can@e0008000 {
			compatible = "xlnx,zynq-can-1.0";
			status = "disabled";
			clocks = <0x2 0x13 0x2 0x24>;
			clock-names = "can_clk", "pclk";
			reg = <0xe0008000 0x1000>;
			interrupts = <0x0 0x1c 0x4>;
			interrupt-parent = <0x1>;
			tx-fifo-depth = <0x40>;
			rx-fifo-depth = <0x40>;
		};

		can@e0009000 {
			compatible = "xlnx,zynq-can-1.0";
			status = "disabled";
			clocks = <0x2 0x14 0x2 0x25>;
			clock-names = "can_clk", "pclk";
			reg = <0xe0009000 0x1000>;
			interrupts = <0x0 0x33 0x4>;
			interrupt-parent = <0x1>;
			tx-fifo-depth = <0x40>;
			rx-fifo-depth = <0x40>;
		};

		gpio@e000a000 {
			compatible = "xlnx,zynq-gpio-1.0";
			#gpio-cells = <0x2>;
			clocks = <0x2 0x2a>;
			gpio-controller;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			interrupt-parent = <0x1>;
			interrupts = <0x0 0x14 0x4>;
			reg = <0xe000a000 0x1000>;
			emio-gpio-width = <0x40>;
			gpio-mask-high = <0x0>;
			gpio-mask-low = <0x5600>;
			linux,phandle = <0x5>;
			phandle = <0x5>;
		};

		i2c@e0004000 {
			compatible = "cdns,i2c-r1p10";
			status = "okay";
			clocks = <0x2 0x26>;
			interrupt-parent = <0x1>;
			interrupts = <0x0 0x19 0x4>;
			reg = <0xe0004000 0x1000>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			clock-frequency = <0x61a80>;
			i2c-reset = <0x5 0x2e 0x0>;
		};

		i2c@e0005000 {
			compatible = "cdns,i2c-r1p10";
			status = "disabled";
			clocks = <0x2 0x27>;
			interrupt-parent = <0x1>;
			interrupts = <0x0 0x30 0x4>;
			reg = <0xe0005000 0x1000>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
		};

		interrupt-controller@f8f01000 {
			compatible = "arm,cortex-a9-gic";
			#interrupt-cells = <0x3>;
			interrupt-controller;
			reg = <0xf8f01000 0x1000 0xf8f00100 0x100>;
			num_cpus = <0x2>;
			num_interrupts = <0x60>;
			linux,phandle = <0x1>;
			phandle = <0x1>;
		};

		cache-controller@f8f02000 {
			compatible = "arm,pl310-cache";
			reg = <0xf8f02000 0x1000>;
			interrupts = <0x0 0x2 0x4>;
			arm,data-latency = <0x3 0x2 0x2>;
			arm,tag-latency = <0x2 0x2 0x2>;
			cache-unified;
			cache-level = <0x2>;
		};

		memory-controller@f8006000 {
			compatible = "xlnx,zynq-ddrc-a05";
			reg = <0xf8006000 0x1000>;
		};

		ocmc@f800c000 {
			compatible = "xlnx,zynq-ocmc-1.0";
			interrupt-parent = <0x1>;
			interrupts = <0x0 0x3 0x4>;
			reg = <0xf800c000 0x1000>;
		};

		serial@e0000000 {
			compatible = "xlnx,xuartps", "cdns,uart-r1p8";
			status = "disabled";
			clocks = <0x2 0x17 0x2 0x28>;
			clock-names = "uart_clk", "pclk";
			reg = <0xe0000000 0x1000>;
			interrupts = <0x0 0x1b 0x4>;
		};

		serial@e0001000 {
			compatible = "xlnx,xuartps", "cdns,uart-r1p8";
			status = "okay";
			clocks = <0x2 0x18 0x2 0x29>;
			clock-names = "uart_clk", "pclk";
			reg = <0xe0001000 0x1000>;
			interrupts = <0x0 0x32 0x4>;
			device_type = "serial";
			port-number = <0x0>;
		};

		spi@e0006000 {
			compatible = "xlnx,zynq-spi-r1p6";
			reg = <0xe0006000 0x1000>;
			status = "okay";
			interrupt-parent = <0x1>;
			interrupts = <0x0 0x1a 0x4>;
			clocks = <0x2 0x19 0x2 0x22>;
			clock-names = "ref_clk", "pclk";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			is-decoded-cs = <0x0>;
			num-cs = <0x3>;

			ad9528-1@0 {
				compatible = "adi,ad9528";
				reg = <0x0>;
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				spi-max-frequency = <0x989680>;
				clock-output-names = "ad9528-1_out0", "ad9528-1_out1", "ad9528-1_out2", "ad9528-1_out3", "ad9528-1_out4", "ad9528-1_out5", "ad9528-1_out6", "ad9528-1_out7", "ad9528-1_out8", "ad9528-1_out9", "ad9528-1_out10", "ad9528-1_out11", "ad9528-1_out12", "ad9528-1_out13";
				#clock-cells = <0x1>;
				adi,vcxo-freq = <0x7530000>;
				adi,refa-enable;
				adi,refa-diff-rcv-enable;
				adi,refa-r-div = <0x1>;
				adi,osc-in-cmos-neg-inp-enable;
				adi,pll1-feedback-div = <0x4>;
				adi,pll1-charge-pump-current-nA = <0x1388>;
				adi,pll2-vco-div-m1 = <0x3>;
				adi,pll2-n2-div = <0xa>;
				adi,pll2-r1-div = <0x1>;
				adi,pll2-charge-pump-current-nA = <0xc4888>;
				adi,sysref-src = <0x2>;
				adi,sysref-pattern-mode = <0x1>;
				adi,sysref-k-div = <0x200>;
				adi,sysref-request-enable;
				adi,sysref-nshot-mode = <0x3>;
				adi,sysref-request-trigger-mode = <0x0>;
				adi,rpole2 = <0x0>;
				adi,rzero = <0x7>;
				adi,cpole1 = <0x2>;
				adi,status-mon-pin0-function-select = <0x1>;
				adi,status-mon-pin1-function-select = <0x7>;
				reset-gpios = <0x5 0x71 0x0>;
				linux,phandle = <0x7>;
				phandle = <0x7>;

				channel@13 {
					reg = <0xd>;
					adi,extended-name = "DEV_CLK";
					adi,driver-mode = <0x0>;
					adi,divider-phase = <0x0>;
					adi,channel-divider = <0xa>;
					adi,signal-source = <0x0>;
				};

				channel@1 {
					reg = <0x1>;
					adi,extended-name = "FMC_CLK";
					adi,driver-mode = <0x0>;
					adi,divider-phase = <0x0>;
					adi,channel-divider = <0xa>;
					adi,signal-source = <0x0>;
				};

				channel@12 {
					reg = <0xc>;
					adi,extended-name = "DEV_SYSREF";
					adi,driver-mode = <0x0>;
					adi,divider-phase = <0x0>;
					adi,channel-divider = <0xa>;
					adi,signal-source = <0x2>;
				};

				channel@3 {
					reg = <0x3>;
					adi,extended-name = "FMC_SYSREF";
					adi,driver-mode = <0x0>;
					adi,divider-phase = <0x0>;
					adi,channel-divider = <0xa>;
					adi,signal-source = <0x2>;
				};
			};

			adrv9009-phy@1 {
				compatible = "adrv9008-1";
				reg = <0x1>;
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				spi-max-frequency = <0x17d7840>;
				interrupt-parent = <0x5>;
				interrupts = <0x69 0x1>;
				clocks = <0x6 0x7 0xd 0x7 0x1 0x7 0xc 0x7 0x3>;
				clock-names = "jesd_rx_clk", "dev_clk", "fmc_clk", "sysref_dev_clk", "sysref_fmc_clk";
				clock-output-names = "rx_sampl_clk", "rx_os_sampl_clk", "tx_sampl_clk";
				#clock-cells = <0x1>;
				adi,jesd204-framer-a-bank-id = <0x1>;
				adi,jesd204-framer-a-device-id = <0x0>;
				adi,jesd204-framer-a-lane0-id = <0x0>;
				adi,jesd204-framer-a-m = <0x4>;
				adi,jesd204-framer-a-k = <0x20>;
				adi,jesd204-framer-a-f = <0x4>;
				adi,jesd204-framer-a-np = <0x10>;
				adi,jesd204-framer-a-scramble = <0x1>;
				adi,jesd204-framer-a-external-sysref = <0x1>;
				adi,jesd204-framer-a-serializer-lanes-enabled = <0x3>;
				adi,jesd204-framer-a-serializer-lane-crossbar = <0xe4>;
				adi,jesd204-framer-a-lmfc-offset = <0x1f>;
				adi,jesd204-framer-a-new-sysref-on-relink = <0x0>;
				adi,jesd204-framer-a-syncb-in-select = <0x0>;
				adi,jesd204-framer-a-over-sample = <0x0>;
				adi,jesd204-framer-a-syncb-in-lvds-mode = <0x1>;
				adi,jesd204-framer-a-syncb-in-lvds-pn-invert = <0x0>;
				adi,jesd204-framer-a-enable-manual-lane-xbar = <0x0>;
				adi,jesd204-framer-b-bank-id = <0x0>;
				adi,jesd204-framer-b-device-id = <0x0>;
				adi,jesd204-framer-b-lane0-id = <0x0>;
				adi,jesd204-framer-b-m = <0x4>;
				adi,jesd204-framer-b-k = <0x20>;
				adi,jesd204-framer-b-f = <0x4>;
				adi,jesd204-framer-b-np = <0x10>;
				adi,jesd204-framer-b-scramble = <0x1>;
				adi,jesd204-framer-b-external-sysref = <0x1>;
				adi,jesd204-framer-b-serializer-lanes-enabled = <0xc>;
				adi,jesd204-framer-b-serializer-lane-crossbar = <0xe4>;
				adi,jesd204-framer-b-lmfc-offset = <0x1f>;
				adi,jesd204-framer-b-new-sysref-on-relink = <0x0>;
				adi,jesd204-framer-b-syncb-in-select = <0x1>;
				adi,jesd204-framer-b-over-sample = <0x0>;
				adi,jesd204-framer-b-syncb-in-lvds-mode = <0x1>;
				adi,jesd204-framer-b-syncb-in-lvds-pn-invert = <0x0>;
				adi,jesd204-framer-b-enable-manual-lane-xbar = <0x0>;
				adi,jesd204-deframer-a-bank-id = <0x0>;
				adi,jesd204-deframer-a-device-id = <0x0>;
				adi,jesd204-deframer-a-lane0-id = <0x0>;
				adi,jesd204-deframer-a-m = <0x4>;
				adi,jesd204-deframer-a-k = <0x20>;
				adi,jesd204-deframer-a-scramble = <0x1>;
				adi,jesd204-deframer-a-external-sysref = <0x1>;
				adi,jesd204-deframer-a-deserializer-lanes-enabled = <0xf>;
				adi,jesd204-deframer-a-deserializer-lane-crossbar = <0xe4>;
				adi,jesd204-deframer-a-lmfc-offset = <0x11>;
				adi,jesd204-deframer-a-new-sysref-on-relink = <0x0>;
				adi,jesd204-deframer-a-syncb-out-select = <0x0>;
				adi,jesd204-deframer-a-np = <0x10>;
				adi,jesd204-deframer-a-syncb-out-lvds-mode = <0x1>;
				adi,jesd204-deframer-a-syncb-out-lvds-pn-invert = <0x0>;
				adi,jesd204-deframer-a-syncb-out-cmos-slew-rate = <0x0>;
				adi,jesd204-deframer-a-syncb-out-cmos-drive-level = <0x0>;
				adi,jesd204-deframer-a-enable-manual-lane-xbar = <0x0>;
				adi,jesd204-ser-amplitude = <0xf>;
				adi,jesd204-ser-pre-emphasis = <0x1>;
				adi,jesd204-ser-invert-lane-polarity = <0x0>;
				adi,jesd204-des-invert-lane-polarity = <0x0>;
				adi,jesd204-des-eq-setting = <0x1>;
				adi,jesd204-sysref-lvds-mode = <0x1>;
				adi,jesd204-sysref-lvds-pn-invert = <0x0>;
				adi,rx-profile-rx-fir-gain_db = <0xfffffffa>;
				adi,rx-profile-rx-fir-num-fir-coefs = <0x30>;
				adi,rx-profile-rx-fir-coefs = <0xfff8ffea 0x200032 0xffbcff96 0x8d00c7 0xfefefea0 0x1ae023c 0xfd4dfc79 0x42d0570 0xf994f784 0xa090df6 0xeef4e427 0x248b7977 0x7977248b 0xe427eef4 0xdf60a09 0xf784f994 0x570042d 0xfc79fd4d 0x23c01ae 0xfea0fefe 0xc7008d 0xff96ffbc 0x320020 0xffeafff8>;
				adi,rx-profile-rx-fir-decimation = <0x2>;
				adi,rx-profile-rx-dec5-decimation = <0x4>;
				adi,rx-profile-rhb1-decimation = <0x2>;
				adi,rx-profile-rx-output-rate_khz = <0x1e000>;
				adi,rx-profile-rf-bandwidth_hz = <0x5f5e100>;
				adi,rx-profile-rx-bbf3d-bcorner_khz = <0x186a0>;
				adi,rx-profile-rx-adc-profile = <0x1090092 0xb5005a 0x500016e 0x4e9001b 0x4ea0011 0x2ce0027 0x30002e 0x1b00a1 0x0 0x0 0x280000 0x70006 0x2a0000 0x70006 0x2a0000 0x19001b 0x0 0x19001b 0x0 0xa5002c 0x1f0389>;
				adi,rx-profile-rx-ddc-mode = <0x0>;
				adi,rx-nco-shifter-band-a-input-band-width_khz = <0x0>;
				adi,rx-nco-shifter-band-a-input-center-freq_khz = <0x0>;
				adi,rx-nco-shifter-band-a-nco1-freq_khz = <0x0>;
				adi,rx-nco-shifter-band-a-nco2-freq_khz = <0x0>;
				adi,rx-nco-shifter-band-binput-band-width_khz = <0x0>;
				adi,rx-nco-shifter-band-binput-center-freq_khz = <0x0>;
				adi,rx-nco-shifter-band-bnco1-freq_khz = <0x0>;
				adi,rx-nco-shifter-band-bnco2-freq_khz = <0x0>;
				adi,rx-gain-control-gain-mode = <0x0>;
				adi,rx-gain-control-rx1-gain-index = <0xff>;
				adi,rx-gain-control-rx2-gain-index = <0xff>;
				adi,rx-gain-control-rx1-max-gain-index = <0xff>;
				adi,rx-gain-control-rx1-min-gain-index = <0xc3>;
				adi,rx-gain-control-rx2-max-gain-index = <0xff>;
				adi,rx-gain-control-rx2-min-gain-index = <0xc3>;
				adi,rx-settings-framer-sel = <0x0>;
				adi,rx-settings-rx-channels = <0x3>;
				adi,orx-profile-rx-fir-gain_db = <0xfffffffa>;
				adi,orx-profile-rx-fir-num-fir-coefs = <0x30>;
				adi,orx-profile-rx-fir-coefs = <0xfff7ffee 0x1f002a 0xffbfffa7 0x8400a8 0xff10fed6 0x18c01e6 0xfd88fcfe 0x3c8048b 0xfa06f8ba 0x9410beb 0xf01ee8a1 0x25d97486 0x748625d9 0xe8a1f01e 0xbeb0941 0xf8bafa06 0x48b03c8 0xfcfefd88 0x1e6018c 0xfed6ff10 0xa80084 0xffa7ffbf 0x2a001f 0xffeefff7>;
				adi,orx-profile-rx-fir-decimation = <0x2>;
				adi,orx-profile-rx-dec5-decimation = <0x4>;
				adi,orx-profile-rhb1-decimation = <0x2>;
				adi,orx-profile-orx-output-rate_khz = <0x1e000>;
				adi,orx-profile-rf-bandwidth_hz = <0x5f5e100>;
				adi,orx-profile-rx-bbf3d-bcorner_khz = <0x36ee8>;
				adi,orx-profile-orx-low-pass-adc-profile = <0x1090092 0xb5005a 0x500016e 0x4e9001b 0x4ea0011 0x2ce0027 0x30002e 0x1b00a1 0x0 0x0 0x280000 0x70006 0x2a0000 0x70006 0x2a0000 0x19001b 0x0 0x19001b 0x0 0xa5002c 0x1f0389>;
				adi,orx-profile-orx-band-pass-adc-profile = <0x1090092 0xb5005a 0x500016e 0x4e9001b 0x4ea0011 0x2ce0027 0x30002e 0x1b00a1 0x0 0x0 0x280000 0x70006 0x2a0000 0x70006 0x2a0000 0x19001b 0x0 0x19001b 0x0 0xa5002c 0x1f0389>;
				adi,orx-profile-orx-ddc-mode = <0x0>;
				adi,orx-profile-orx-merge-filter = <0x0 0x0 0x0 0x0 0x0 0x0>;
				adi,orx-gain-control-gain-mode = <0x0>;
				adi,orx-gain-control-orx1-gain-index = <0xff>;
				adi,orx-gain-control-orx2-gain-index = <0xff>;
				adi,orx-gain-control-orx1-max-gain-index = <0xff>;
				adi,orx-gain-control-orx1-min-gain-index = <0xc3>;
				adi,orx-gain-control-orx2-max-gain-index = <0xff>;
				adi,orx-gain-control-orx2-min-gain-index = <0xc3>;
				adi,obs-settings-framer-sel = <0x1>;
				adi,obs-settings-obs-rx-channels-enable = <0x3>;
				adi,obs-settings-obs-rx-lo-source = <0x0>;
				adi,tx-profile-tx-fir-gain_db = <0x6>;
				adi,tx-profile-tx-fir-num-fir-coefs = <0x50>;
				adi,tx-profile-tx-fir-coefs = <0x0 0x1 0xfffd 0x10007 0xfffdfff3 0x70019 0xfff2ffd6 0x1b0045 0xffd2ff95 0x4a00a0 0xff8dff1b 0xb80150 0xfef8fe2c 0x17e028d 0xfde6fc78 0x2f204f5 0xfbe0f8ce 0x5ce0b3f 0xf811ed12 0xee83f5d 0x3f5d0ee8 0xed12f811 0xb3f05ce 0xf8cefbe0 0x4f502f2 0xfc78fde6 0x28d017e 0xfe2cfef8 0x15000b8 0xff1bff8d 0xa0004a 0xff95ffd2 0x45001b 0xffd6fff2 0x190007 0xfff3fffd 0x70001 0xfffd0000 0x10000 0x0>;
				adi,tx-profile-dac-div = <0x1>;
				adi,tx-profile-tx-fir-interpolation = <0x2>;
				adi,tx-profile-thb1-interpolation = <0x2>;
				adi,tx-profile-thb2-interpolation = <0x2>;
				adi,tx-profile-thb3-interpolation = <0x2>;
				adi,tx-profile-tx-int5-interpolation = <0x1>;
				adi,tx-profile-tx-input-rate_khz = <0x1e000>;
				adi,tx-profile-primary-sig-bandwidth_hz = <0x2faf080>;
				adi,tx-profile-rf-bandwidth_hz = <0x5f5e100>;
				adi,tx-profile-tx-dac3d-bcorner_khz = <0x2da78>;
				adi,tx-profile-tx-bbf3d-bcorner_khz = <0xdac0>;
				adi,tx-profile-loop-back-adc-profile = <0x1090092 0xb5005a 0x500016e 0x4e9001b 0x4ea0011 0x2ce0027 0x30002e 0x1b00a1 0x0 0x0 0x280000 0x70006 0x2a0000 0x70006 0x2a0000 0x19001b 0x0 0x19001b 0x0 0xa5002c 0x1f0389>;
				adi,tx-settings-deframer-sel = <0x0>;
				adi,tx-settings-tx-channels = <0x3>;
				adi,tx-settings-tx-atten-step-size = <0x0>;
				adi,tx-settings-tx1-atten_md-b = <0x2710>;
				adi,tx-settings-tx2-atten_md-b = <0x2710>;
				adi,tx-settings-dis-tx-data-if-pll-unlock = <0x0>;
				adi,dig-clocks-device-clock_khz = <0x1e000>;
				adi,dig-clocks-clk-pll-vco-freq_khz = <0x960000>;
				adi,dig-clocks-clk-pll-hs-div = <0x1>;
				adi,dig-clocks-rf-pll-use-external-lo = <0x0>;
				adi,dig-clocks-rf-pll-phase-sync-mode = <0x0>;
				adi,rxagc-peak-agc-under-range-low-interval_ns = <0xcd>;
				adi,rxagc-peak-agc-under-range-mid-interval = <0x2>;
				adi,rxagc-peak-agc-under-range-high-interval = <0x4>;
				adi,rxagc-peak-apd-high-thresh = <0x27>;
				adi,rxagc-peak-apd-low-gain-mode-high-thresh = <0x24>;
				adi,rxagc-peak-apd-low-thresh = <0x17>;
				adi,rxagc-peak-apd-low-gain-mode-low-thresh = <0x13>;
				adi,rxagc-peak-apd-upper-thresh-peak-exceeded-cnt = <0x6>;
				adi,rxagc-peak-apd-lower-thresh-peak-exceeded-cnt = <0x3>;
				adi,rxagc-peak-apd-gain-step-attack = <0x4>;
				adi,rxagc-peak-apd-gain-step-recovery = <0x2>;
				adi,rxagc-peak-enable-hb2-overload = <0x1>;
				adi,rxagc-peak-hb2-overload-duration-cnt = <0x1>;
				adi,rxagc-peak-hb2-overload-thresh-cnt = <0x4>;
				adi,rxagc-peak-hb2-high-thresh = <0xb5>;
				adi,rxagc-peak-hb2-under-range-low-thresh = <0x2d>;
				adi,rxagc-peak-hb2-under-range-mid-thresh = <0x5a>;
				adi,rxagc-peak-hb2-under-range-high-thresh = <0x80>;
				adi,rxagc-peak-hb2-upper-thresh-peak-exceeded-cnt = <0x6>;
				adi,rxagc-peak-hb2-lower-thresh-peak-exceeded-cnt = <0x3>;
				adi,rxagc-peak-hb2-gain-step-high-recovery = <0x2>;
				adi,rxagc-peak-hb2-gain-step-low-recovery = <0x4>;
				adi,rxagc-peak-hb2-gain-step-mid-recovery = <0x8>;
				adi,rxagc-peak-hb2-gain-step-attack = <0x4>;
				adi,rxagc-peak-hb2-overload-power-mode = <0x1>;
				adi,rxagc-peak-hb2-ovrg-sel = <0x0>;
				adi,rxagc-peak-hb2-thresh-config = <0x3>;
				adi,rxagc-power-power-enable-measurement = <0x1>;
				adi,rxagc-power-power-use-rfir-out = <0x1>;
				adi,rxagc-power-power-use-bbdc2 = <0x0>;
				adi,rxagc-power-under-range-high-power-thresh = <0x9>;
				adi,rxagc-power-under-range-low-power-thresh = <0x2>;
				adi,rxagc-power-under-range-high-power-gain-step-recovery = <0x4>;
				adi,rxagc-power-under-range-low-power-gain-step-recovery = <0x4>;
				adi,rxagc-power-power-measurement-duration = <0x5>;
				adi,rxagc-power-rx1-tdd-power-meas-duration = <0x5>;
				adi,rxagc-power-rx1-tdd-power-meas-delay = <0x1>;
				adi,rxagc-power-rx2-tdd-power-meas-duration = <0x5>;
				adi,rxagc-power-rx2-tdd-power-meas-delay = <0x1>;
				adi,rxagc-power-upper0-power-thresh = <0x2>;
				adi,rxagc-power-upper1-power-thresh = <0x0>;
				adi,rxagc-power-power-log-shift = <0x0>;
				adi,rxagc-agc-peak-wait-time = <0x4>;
				adi,rxagc-agc-rx1-max-gain-index = <0xff>;
				adi,rxagc-agc-rx1-min-gain-index = <0xc3>;
				adi,rxagc-agc-rx2-max-gain-index = <0xff>;
				adi,rxagc-agc-rx2-min-gain-index = <0xc3>;
				adi,rxagc-agc-gain-update-counter_us = <0xfa>;
				adi,rxagc-agc-rx1-attack-delay = <0xa>;
				adi,rxagc-agc-rx2-attack-delay = <0xa>;
				adi,rxagc-agc-slow-loop-settling-delay = <0x10>;
				adi,rxagc-agc-low-thresh-prevent-gain = <0x0>;
				adi,rxagc-agc-change-gain-if-thresh-high = <0x1>;
				adi,rxagc-agc-peak-thresh-gain-control-mode = <0x1>;
				adi,rxagc-agc-reset-on-rxon = <0x0>;
				adi,rxagc-agc-enable-sync-pulse-for-gain-counter = <0x0>;
				adi,rxagc-agc-enable-ip3-optimization-thresh = <0x0>;
				adi,rxagc-ip3-over-range-thresh = <0x1f>;
				adi,rxagc-ip3-over-range-thresh-index = <0xf6>;
				adi,rxagc-ip3-peak-exceeded-cnt = <0x4>;
				adi,rxagc-agc-enable-fast-recovery-loop = <0x0>;
				adi,aux-dac-enables = <0x0>;
				adi,aux-dac-vref0 = <0x3>;
				adi,aux-dac-resolution0 = <0x0>;
				adi,aux-dac-values0 = <0x0>;
				adi,aux-dac-vref1 = <0x3>;
				adi,aux-dac-resolution1 = <0x0>;
				adi,aux-dac-values1 = <0x0>;
				adi,aux-dac-vref2 = <0x3>;
				adi,aux-dac-resolution2 = <0x0>;
				adi,aux-dac-values2 = <0x0>;
				adi,aux-dac-vref3 = <0x3>;
				adi,aux-dac-resolution3 = <0x0>;
				adi,aux-dac-values3 = <0x0>;
				adi,aux-dac-vref4 = <0x3>;
				adi,aux-dac-resolution4 = <0x0>;
				adi,aux-dac-values4 = <0x0>;
				adi,aux-dac-vref5 = <0x3>;
				adi,aux-dac-resolution5 = <0x0>;
				adi,aux-dac-values5 = <0x0>;
				adi,aux-dac-vref6 = <0x3>;
				adi,aux-dac-resolution6 = <0x0>;
				adi,aux-dac-values6 = <0x0>;
				adi,aux-dac-vref7 = <0x3>;
				adi,aux-dac-resolution7 = <0x0>;
				adi,aux-dac-values7 = <0x0>;
				adi,aux-dac-vref8 = <0x3>;
				adi,aux-dac-resolution8 = <0x0>;
				adi,aux-dac-values8 = <0x0>;
				adi,aux-dac-vref9 = <0x3>;
				adi,aux-dac-resolution9 = <0x0>;
				adi,aux-dac-values9 = <0x0>;
				adi,aux-dac-vref10 = <0x3>;
				adi,aux-dac-resolution10 = <0x0>;
				adi,aux-dac-values10 = <0x0>;
				adi,aux-dac-vref11 = <0x3>;
				adi,aux-dac-resolution11 = <0x0>;
				adi,aux-dac-values11 = <0x0>;
				adi,arm-gpio-config-orx1-tx-sel0-pin-gpio-pin-sel = <0x0>;
				adi,arm-gpio-config-orx1-tx-sel0-pin-polarity = <0x0>;
				adi,arm-gpio-config-orx1-tx-sel0-pin-enable = <0x0>;
				adi,arm-gpio-config-orx1-tx-sel1-pin-gpio-pin-sel = <0x0>;
				adi,arm-gpio-config-orx1-tx-sel1-pin-polarity = <0x0>;
				adi,arm-gpio-config-orx1-tx-sel1-pin-enable = <0x0>;
				adi,arm-gpio-config-orx2-tx-sel0-pin-gpio-pin-sel = <0x0>;
				adi,arm-gpio-config-orx2-tx-sel0-pin-polarity = <0x0>;
				adi,arm-gpio-config-orx2-tx-sel0-pin-enable = <0x0>;
				adi,arm-gpio-config-orx2-tx-sel1-pin-gpio-pin-sel = <0x0>;
				adi,arm-gpio-config-orx2-tx-sel1-pin-polarity = <0x0>;
				adi,arm-gpio-config-orx2-tx-sel1-pin-enable = <0x0>;
				adi,arm-gpio-config-en-tx-tracking-cals-gpio-pin-sel = <0x0>;
				adi,arm-gpio-config-en-tx-tracking-cals-polarity = <0x0>;
				adi,arm-gpio-config-en-tx-tracking-cals-enable = <0x0>;
				adi,orx-lo-cfg-disable-aux-pll-relocking = <0x0>;
				adi,orx-lo-cfg-gpio-select = <0x13>;
				adi,fhm-config-fhm-gpio-pin = <0x0>;
				adi,fhm-config-fhm-min-freq_mhz = <0x64>;
				adi,fhm-config-fhm-max-freq_mhz = <0x64>;
				adi,fhm-mode-fhm-enable = <0x0>;
				adi,fhm-mode-enable-mcs-sync = <0x0>;
				adi,fhm-mode-fhm-trigger-mode = <0x0>;
				adi,fhm-mode-fhm-exit-mode = <0x0>;
				adi,fhm-mode-fhm-init-frequency_hz = <0x92080880>;
				adi,rx1-gain-ctrl-pin-inc-step = <0x1>;
				adi,rx1-gain-ctrl-pin-dec-step = <0x1>;
				adi,rx1-gain-ctrl-pin-rx-gain-inc-pin = <0x0>;
				adi,rx1-gain-ctrl-pin-rx-gain-dec-pin = <0x1>;
				adi,rx1-gain-ctrl-pin-enable = <0x0>;
				adi,rx2-gain-ctrl-pin-inc-step = <0x1>;
				adi,rx2-gain-ctrl-pin-dec-step = <0x1>;
				adi,rx2-gain-ctrl-pin-rx-gain-inc-pin = <0x3>;
				adi,rx2-gain-ctrl-pin-rx-gain-dec-pin = <0x4>;
				adi,rx2-gain-ctrl-pin-enable = <0x0>;
				adi,tx1-atten-ctrl-pin-step-size = <0x0>;
				adi,tx1-atten-ctrl-pin-tx-atten-inc-pin = <0x4>;
				adi,tx1-atten-ctrl-pin-tx-atten-dec-pin = <0x5>;
				adi,tx1-atten-ctrl-pin-enable = <0x0>;
				adi,tx2-atten-ctrl-pin-step-size = <0x0>;
				adi,tx2-atten-ctrl-pin-tx-atten-inc-pin = <0x6>;
				adi,tx2-atten-ctrl-pin-tx-atten-dec-pin = <0x7>;
				adi,tx2-atten-ctrl-pin-enable = <0x0>;
				adi,tx-pa-protection-avg-duration = <0x3>;
				adi,tx-pa-protection-tx-atten-step = <0x2>;
				adi,tx-pa-protection-tx1-power-threshold = <0x1000>;
				adi,tx-pa-protection-tx2-power-threshold = <0x1000>;
				adi,tx-pa-protection-peak-count = <0x4>;
				adi,tx-pa-protection-tx1-peak-threshold = <0x82>;
				adi,tx-pa-protection-tx2-peak-threshold = <0x82>;
				reset-gpios = <0x5 0x6a 0x0>;
				test-gpios = <0x5 0x6b 0x0>;
				sysref-req-gpios = <0x5 0x70 0x0>;
				rx2-enable-gpios = <0x5 0x6c 0x0>;
				rx1-enable-gpios = <0x5 0x6d 0x0>;
				linux,phandle = <0xb>;
				phandle = <0xb>;
			};
		};

		spi@e0007000 {
			compatible = "xlnx,zynq-spi-r1p6";
			reg = <0xe0007000 0x1000>;
			status = "okay";
			interrupt-parent = <0x1>;
			interrupts = <0x0 0x31 0x4>;
			clocks = <0x2 0x1a 0x2 0x23>;
			clock-names = "ref_clk", "pclk";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			is-decoded-cs = <0x0>;
			num-cs = <0x3>;
		};

		spi@e000d000 {
			clock-names = "ref_clk", "pclk";
			clocks = <0x2 0xa 0x2 0x2b>;
			compatible = "xlnx,zynq-qspi-1.0";
			status = "okay";
			interrupt-parent = <0x1>;
			interrupts = <0x0 0x13 0x4>;
			reg = <0xe000d000 0x1000>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			is-dual = <0x1>;
			num-cs = <0x1>;
			spi-rx-bus-width = <0x8>;
			spi-tx-bus-width = <0x8>;

			ps7-qspi@0 {
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				spi-tx-bus-width = <0x1>;
				spi-rx-bus-width = <0x4>;
				compatible = "n25q128a11";
				reg = <0x0>;
				spi-max-frequency = <0x2faf080>;

				partition@0 {
					label = "boot";
					reg = <0x0 0x500000>;
				};

				partition@500000 {
					label = "bootenv";
					reg = <0x500000 0x20000>;
				};

				partition@520000 {
					label = "config";
					reg = <0x520000 0x20000>;
				};

				partition@540000 {
					label = "image";
					reg = <0x540000 0xa80000>;
				};

				partition@fc0000 {
					label = "spare";
					reg = <0xfc0000 0x0>;
				};
			};
		};

		memory-controller@e000e000 {
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			status = "disabled";
			clock-names = "memclk", "aclk";
			clocks = <0x2 0xb 0x2 0x2c>;
			compatible = "arm,pl353-smc-r2p1";
			interrupt-parent = <0x1>;
			interrupts = <0x0 0x12 0x4>;
			ranges;
			reg = <0xe000e000 0x1000>;

			flash@e1000000 {
				status = "disabled";
				compatible = "arm,pl353-nand-r2p1";
				reg = <0xe1000000 0x1000000>;
				#address-cells = <0x1>;
				#size-cells = <0x1>;
			};

			flash@e2000000 {
				status = "disabled";
				compatible = "cfi-flash";
				reg = <0xe2000000 0x2000000>;
				#address-cells = <0x1>;
				#size-cells = <0x1>;
			};
		};

		ethernet@e000b000 {
			compatible = "cdns,zynq-gem", "cdns,gem";
			reg = <0xe000b000 0x1000>;
			status = "okay";
			interrupts = <0x0 0x16 0x4>;
			clocks = <0x2 0x1e 0x2 0x1e 0x2 0xd>;
			clock-names = "pclk", "hclk", "tx_clk";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			enet-reset = <0x5 0x2f 0x0>;
			phy-mode = "rgmii-id";
			xlnx,ptp-enet-clock = <0x69f6bcb>;
			phy-handle = <0x8>;

			phy@7 {
				device_type = "ethernet-phy";
				reg = <0x7>;
				linux,phandle = <0x8>;
				phandle = <0x8>;
			};
		};

		ethernet@e000c000 {
			compatible = "cdns,zynq-gem", "cdns,gem";
			reg = <0xe000c000 0x1000>;
			status = "disabled";
			interrupts = <0x0 0x2d 0x4>;
			clocks = <0x2 0x1f 0x2 0x1f 0x2 0xe>;
			clock-names = "pclk", "hclk", "tx_clk";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
		};

		mmc@e0100000 {
			compatible = "arasan,sdhci-8.9a";
			status = "okay";
			clock-names = "clk_xin", "clk_ahb";
			clocks = <0x2 0x15 0x2 0x20>;
			interrupt-parent = <0x1>;
			interrupts = <0x0 0x18 0x4>;
			reg = <0xe0100000 0x1000>;
			xlnx,has-cd = <0x1>;
			xlnx,has-power = <0x0>;
			xlnx,has-wp = <0x1>;
		};

		mmc@e0101000 {
			compatible = "arasan,sdhci-8.9a";
			status = "disabled";
			clock-names = "clk_xin", "clk_ahb";
			clocks = <0x2 0x16 0x2 0x21>;
			interrupt-parent = <0x1>;
			interrupts = <0x0 0x2f 0x4>;
			reg = <0xe0101000 0x1000>;
		};

		slcr@f8000000 {
			u-boot,dm-pre-reloc;
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd";
			reg = <0xf8000000 0x1000>;
			ranges;
			linux,phandle = <0x9>;
			phandle = <0x9>;

			clkc@100 {
				u-boot,dm-pre-reloc;
				#clock-cells = <0x1>;
				compatible = "xlnx,ps7-clkc";
				fclk-enable = <0x3>;
				clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci", "lqspi", "smc", "pcap", "gem0", "gem1", "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1", "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", "dma", "usb0_aper", "usb1_aper", "gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper", "spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper", "swdt", "dbg_trc", "dbg_apb";
				reg = <0x100 0x100>;
				ps-clk-frequency = <0x1fca055>;
				linux,phandle = <0x2>;
				phandle = <0x2>;
			};

			rstc@200 {
				compatible = "xlnx,zynq-reset";
				reg = <0x200 0x48>;
				#reset-cells = <0x1>;
				syscon = <0x9>;
			};

			pinctrl@700 {
				compatible = "xlnx,pinctrl-zynq";
				reg = <0x700 0x200>;
				syscon = <0x9>;
			};
		};

		dmac@f8003000 {
			compatible = "arm,pl330", "arm,primecell";
			reg = <0xf8003000 0x1000>;
			interrupt-parent = <0x1>;
			interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", "dma4", "dma5", "dma6", "dma7";
			interrupts = <0x0 0xd 0x4 0x0 0xe 0x4 0x0 0xf 0x4 0x0 0x10 0x4 0x0 0x11 0x4 0x0 0x28 0x4 0x0 0x29 0x4 0x0 0x2a 0x4 0x0 0x2b 0x4>;
			#dma-cells = <0x1>;
			#dma-channels = <0x8>;
			#dma-requests = <0x4>;
			clocks = <0x2 0x1b>;
			clock-names = "apb_pclk";
		};

		devcfg@f8007000 {
			compatible = "xlnx,zynq-devcfg-1.0";
			interrupt-parent = <0x1>;
			interrupts = <0x0 0x8 0x4>;
			reg = <0xf8007000 0x100>;
			clocks = <0x2 0xc 0x2 0xf 0x2 0x10 0x2 0x11 0x2 0x12>;
			clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
			syscon = <0x9>;
			linux,phandle = <0x4>;
			phandle = <0x4>;
		};

		efuse@f800d000 {
			compatible = "xlnx,zynq-efuse";
			reg = <0xf800d000 0x20>;
		};

		timer@f8f00200 {
			compatible = "arm,cortex-a9-global-timer";
			reg = <0xf8f00200 0x20>;
			interrupts = <0x1 0xb 0x301>;
			interrupt-parent = <0x1>;
			clocks = <0x2 0x4>;
		};

		timer@f8001000 {
			interrupt-parent = <0x1>;
			interrupts = <0x0 0xa 0x4 0x0 0xb 0x4 0x0 0xc 0x4>;
			compatible = "cdns,ttc";
			clocks = <0x2 0x6>;
			reg = <0xf8001000 0x1000>;
		};

		timer@f8002000 {
			interrupt-parent = <0x1>;
			interrupts = <0x0 0x25 0x4 0x0 0x26 0x4 0x0 0x27 0x4>;
			compatible = "cdns,ttc";
			clocks = <0x2 0x6>;
			reg = <0xf8002000 0x1000>;
		};

		timer@f8f00600 {
			interrupt-parent = <0x1>;
			interrupts = <0x1 0xd 0x301>;
			compatible = "arm,cortex-a9-twd-timer";
			reg = <0xf8f00600 0x20>;
			clocks = <0x2 0x4>;
		};

		usb@e0002000 {
			compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
			status = "okay";
			clocks = <0x2 0x1c>;
			interrupt-parent = <0x1>;
			interrupts = <0x0 0x15 0x4>;
			reg = <0xe0002000 0x1000>;
			phy_type = "ulpi";
			usb-reset = <0x5 0x7 0x0>;
			dr_mode = "host";
			xlnx,phy-reset-gpio = <0x5 0x7 0x0>;
		};

		usb@e0003000 {
			compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
			status = "disabled";
			clocks = <0x2 0x1d>;
			interrupt-parent = <0x1>;
			interrupts = <0x0 0x2c 0x4>;
			reg = <0xe0003000 0x1000>;
			phy_type = "ulpi";
		};

		watchdog@f8005000 {
			clocks = <0x2 0x2d>;
			compatible = "cdns,wdt-r1p2";
			interrupt-parent = <0x1>;
			interrupts = <0x0 0x9 0x1>;
			reg = <0xf8005000 0x1000>;
			timeout-sec = <0xa>;
		};
	};

	amba_pl {
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		compatible = "simple-bus";
		ranges;

		gpio@41200000 {
			#gpio-cells = <0x3>;
			clock-names = "s_axi_aclk";
			clocks = <0x2 0xf>;
			compatible = "xlnx,axi-gpio-2.0", "xlnx,xps-gpio-1.00.a";
			gpio-controller;
			reg = <0x41200000 0x10000>;
			xlnx,all-inputs = <0x0>;
			xlnx,all-inputs-2 = <0x1>;
			xlnx,all-outputs = <0x1>;
			xlnx,all-outputs-2 = <0x0>;
			xlnx,dout-default = <0x0>;
			xlnx,dout-default-2 = <0x0>;
			xlnx,gpio-width = <0x4>;
			xlnx,gpio2-width = <0x4>;
			xlnx,interrupt-present = <0x0>;
			xlnx,is-dual = <0x1>;
			xlnx,tri-default = <0xffffffff>;
			xlnx,tri-default-2 = <0xffffffff>;
		};
	};

	chosen {
		bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait";
		stdout-path = "serial0:115200n8";
		linux,stdout-path = "/amba@0/uart@E0001000";
	};

	aliases {
		ethernet0 = "/amba/ethernet@e000b000";
		serial0 = "/amba/serial@e0001000";
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x40000000>;
	};

	fpga-axi@0 {
		compatible = "simple-bus";
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges;

		dma@7c400000 {
			compatible = "adi,axi-dmac-1.00.a";
			reg = <0x7c400000 0x10000>;
			#dma-cells = <0x1>;
			#clock-cells = <0x0>;
			interrupts = <0x0 0x39 0x0>;
			clocks = <0x2 0x10>;
			linux,phandle = <0xa>;
			phandle = <0xa>;

			adi,channels {
				#size-cells = <0x0>;
				#address-cells = <0x1>;

				dma-channel@0 {
					reg = <0x0>;
					adi,source-bus-width = <0x40>;
					adi,source-bus-type = <0x2>;
					adi,destination-bus-width = <0x40>;
					adi,destination-bus-type = <0x0>;
				};
			};
		};

		axi-adrv9009-rx-hpc@44a00000 {
			compatible = "adi,axi-adrv9009-rx-1.0";
			reg = <0x44a00000 0x8000>;
			dmas = <0xa 0x0>;
			dma-names = "rx";
			spibus-connected = <0xb>;
		};

		axi-jesd204-rx@44aa0000 {
			compatible = "adi,axi-jesd204-rx-1.0";
			reg = <0x44aa0000 0x1000>;
			interrupts = <0x0 0x36 0x0>;
			clocks = <0x2 0x10 0xc 0xd 0x0>;
			clock-names = "s_axi_aclk", "device_clk", "lane_clk";
			#clock-cells = <0x0>;
			clock-output-names = "jesd_rx_lane_clk";
			adi,octets-per-frame = <0x4>;
			adi,frames-per-multiframe = <0x20>;
			linux,phandle = <0x6>;
			phandle = <0x6>;
		};

		axi-clkgen@43c10000 {
			compatible = "adi,axi-clkgen-2.00.a";
			reg = <0x43c10000 0x10000>;
			#clock-cells = <0x0>;
			clocks = <0x7 0x1>;
			clock-output-names = "axi_rx_clkgen";
			linux,phandle = <0xc>;
			phandle = <0xc>;
		};

		axi-adxcvr-rx@44a60000 {
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			compatible = "adi,axi-adxcvr-1.0";
			reg = <0x44a60000 0x1000>;
			clocks = <0x7 0x1 0xc 0x0>;
			clock-names = "conv", "div40";
			#clock-cells = <0x1>;
			clock-output-names = "rx_gt_clk", "rx_out_clk";
			adi,sys-clk-select = <0x0>;
			adi,out-clk-select = <0x3>;
			adi,use-lpm-enable;
			adi,use-cpll-enable;
			linux,phandle = <0xd>;
			phandle = <0xd>;
		};
	};

	leds {
		compatible = "gpio-leds";

		ds8 {
			label = "ds12:green";
			gpios = <0x5 0x3d 0x0>;
		};

		ds9 {
			label = "ds15:green";
			gpios = <0x5 0x3e 0x0>;
		};

		ds10 {
			label = "ds16:green";
			gpios = <0x5 0x3f 0x0>;
		};

		ds35 {
			label = "ds17:green";
			gpios = <0x5 0x40 0x0>;
		};
	};

	gpio_keys {
		compatible = "gpio-keys";
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		autorepeat;

		sw7 {
			label = "Left";
			linux,code = <0x69>;
			gpios = <0x5 0x3a 0x0>;
		};

		sw8 {
			label = "Right";
			linux,code = <0x6a>;
			gpios = <0x5 0x3c 0x0>;
		};

		sw9 {
			label = "Select";
			linux,code = <0x1c>;
			gpios = <0x5 0x3b 0x0>;
		};
	};

	clocks {

		clock@0 {
			compatible = "fixed-clock";
			clock-frequency = <0xbb8000>;
			clock-output-names = "adrv9009_ext_refclk";
			#clock-cells = <0x0>;
		};
	};
};