we have zynq-zc706-adv7511-ad9361-fmcomms2-3 and it includes the SD-card image which provided by analog devices(including the analog devices linux environment and iio oscilloscope/libiio)
we want to simulate in the simulink (stream data not hdl coder) the next matlab system block
the problem with that block that we want to include in the simulation the ad-freqcvt1-ebz down-up converter. we understand that we may need to change the cfg file which for the moment is written like this :
data_in_device = cf-ad9361-dds-core-lpc data_out_device = cf-ad9361-lpc ctrl_device = ad9361-phy channel = RX_LO_FREQ,IN,out_altvoltage0_RX_LO_frequency, channel = RX_SAMPLING_FREQ,IN,in_voltage_sampling_frequency, channel = RX_RF_BANDWIDTH,IN,in_voltage_rf_bandwidth, channel = RX1_GAIN_MODE,IN,in_voltage0_gain_control_mode, channel = RX1_GAIN,IN,in_voltage0_hardwaregain, channel = RX1_RSSI,OUT,in_voltage0_rssi, channel = RX2_GAIN_MODE,IN,in_voltage1_gain_control_mode, channel = RX2_GAIN,IN,in_voltage1_hardwaregain, channel = RX2_RSSI,OUT,in_voltage1_rssi, channel = TX_LO_FREQ,IN,out_altvoltage1_TX_LO_frequency, channel = TX_SAMPLING_FREQ,IN,out_voltage_sampling_frequency, channel = TX_RF_BANDWIDTH,IN,out_voltage_rf_bandwidth,
what are the changes that need to be done in order to achieve the required block ? (and how to write them in cfg file )
thank for all the answers.