ADRV9009 does not enumerate axi-adrv9009-tx-hpc and axi-adrv9009-rx-hpc during boot

gavint

on Jul 13, 2020

STEP 1:

Using the ADRV9009 evaluation board with a ZCU102 carrier, I was able to port the example Vivado project to Petalinux. I am using the ADI kernel in Petalinux so that I have access to all the ADI IIO device drivers and libraries. This boots successfully and I am able to capture samples with IIO Oscilloscope.

STEP 2:

I now need to move the ADRV9009 evaluation board to a custom carrier platform. I have moved the firmware to this custom carrier and created a Petalinux project for this custom carrier. As before, I am using the ADI kernel in Petalinux.

During the boot of the custom carrier, the ADRV9009 evaluation board is being detected and is being configured:

[    6.070407] adrv9009 spi1.1: adrv9009_probe : enter
[    6.078099] adrv9009 spi1.1: ADIHAL_resetHw at index
[    6.122330] mmc0: new high speed SDHC card at address 59b4
[   14.179486] adrv9009 spi1.1: adrv9009_probe: adrv9009 Rev 192, Firmware 6.0.2 API version: 3.6.0.5 successfully initialized

However, the following is not happening (taken from the working configuration with the ZCU102 carrier):

[ 14.201789] cf_axi_dds 84a04000.axi-adrv9009-tx-hpc: Analog Devices CF_AXI_DDS_DDS MASTER (9.00.b) at 0x84A04000 mapped to 0xffffff800d5f0000, probed DDS AD9371
[ 14.236477] cf_axi_adc 84a00000.axi-adrv9009-rx-hpc: ADI AIM (10.00.b) at 0x84A00000 mapped to 0xffffff800d600000, probed ADC ADRV9009 as MASTER

IIO Oscilloscope is able to successfully connect to the ADRV9009. However, because the above doesn't happen, I cannot plot the I/Q sample data from the RX inputs.

Please can you tell me what device driver is responsible for the following:

I have been unable to determine which device driver is responsible for the above inside the ADI kernel.

I have attached my device tree at the end of this post.

I believe I have enabled all the required device drivers in the kernel configuration menu.

Please can you provide some guidance as to why axi-adrv9009-tx-hpc and axi-adrv9009-rx-hpc is not being detected.

Thank you.

0 gavint
on Jul 13, 2020 10:23 AM
For more details on how I created the image on the ZCU102, see the following post:

https://ez.analog.com/linux-software-drivers/f/q-a/113846/zcu102-adrv9009---fails-during-adrv9009_probe

The following is my compiled device tree:

/dts-v1/;

/ {
   compatible = "xlnx,zynqmp";
   #address-cells = <0x2>;
   #size-cells = <0x2>;

   cpus {
       #address-cells = <0x1>;
       #size-cells = <0x0>;

       cpu@0 {
           compatible = "arm,cortex-a53", "arm,armv8";
           device_type = "cpu";
           enable-method = "psci";
           operating-points-v2 = <0x1>;
           reg = <0x0>;
           cpu-idle-states = <0x2>;
           clocks = <0x3 0xa>;
       };

       cpu@1 {
           compatible = "arm,cortex-a53", "arm,armv8";
           device_type = "cpu";
           enable-method = "psci";
           reg = <0x1>;
           operating-points-v2 = <0x1>;
           cpu-idle-states = <0x2>;
       };

       cpu@2 {
           compatible = "arm,cortex-a53", "arm,armv8";
           device_type = "cpu";
           enable-method = "psci";
           reg = <0x2>;
           operating-points-v2 = <0x1>;
           cpu-idle-states = <0x2>;
       };

       cpu@3 {
           compatible = "arm,cortex-a53", "arm,armv8";
           device_type = "cpu";
           enable-method = "psci";
           reg = <0x3>;
           operating-points-v2 = <0x1>;
           cpu-idle-states = <0x2>;
       };

       idle-states {
           entry-method = "arm,psci";

           cpu-sleep-0 {
               compatible = "arm,idle-state";
               arm,psci-suspend-param = <0x40000000>;
               local-timer-stop;
               entry-latency-us = <0x12c>;
               exit-latency-us = <0x258>;
               min-residency-us = <0x2710>;
               linux,phandle = <0x2>;
               phandle = <0x2>;
           };
       };
   };

   cpu_opp_table {
       compatible = "operating-points-v2";
       opp-shared;
       linux,phandle = <0x1>;
       phandle = <0x1>;

       opp00 {
           opp-hz = <0x0 0x47868bf4>;
           opp-microvolt = <0xf4240>;
           clock-latency-ns = <0x7a120>;
       };

       opp01 {
           opp-hz = <0x0 0x23c345fa>;
           opp-microvolt = <0xf4240>;
           clock-latency-ns = <0x7a120>;
       };

       opp02 {
           opp-hz = <0x0 0x17d783fc>;
           opp-microvolt = <0xf4240>;
           clock-latency-ns = <0x7a120>;
       };

       opp03 {
           opp-hz = <0x0 0x11e1a2fd>;
           opp-microvolt = <0xf4240>;
           clock-latency-ns = <0x7a120>;
       };
   };

   dcc {
       compatible = "arm,dcc";
       status = "disabled";
       u-boot,dm-pre-reloc;
   };

   power-domains {
       compatible = "xlnx,zynqmp-genpd";

       pd-usb0 {
           #power-domain-cells = <0x0>;
           pd-id = <0x16>;
           linux,phandle = <0x2c>;
           phandle = <0x2c>;
       };

       pd-usb1 {
           #power-domain-cells = <0x0>;
           pd-id = <0x17>;
           linux,phandle = <0x2d>;
           phandle = <0x2d>;
       };

       pd-sata {
           #power-domain-cells = <0x0>;
           pd-id = <0x1c>;
           linux,phandle = <0x1c>;
           phandle = <0x1c>;
       };

       pd-spi0 {
           #power-domain-cells = <0x0>;
           pd-id = <0x23>;
           linux,phandle = <0x1f>;
           phandle = <0x1f>;
       };

       pd-spi1 {
           #power-domain-cells = <0x0>;
           pd-id = <0x24>;
           linux,phandle = <0x25>;
           phandle = <0x25>;
       };

       pd-uart0 {
           #power-domain-cells = <0x0>;
           pd-id = <0x21>;
           linux,phandle = <0x2a>;
           phandle = <0x2a>;
       };

       pd-uart1 {
           #power-domain-cells = <0x0>;
           pd-id = <0x22>;
           linux,phandle = <0x2b>;
           phandle = <0x2b>;
       };

       pd-eth0 {
           #power-domain-cells = <0x0>;
           pd-id = <0x1d>;
           linux,phandle = <0xe>;
           phandle = <0xe>;
       };

       pd-eth1 {
           #power-domain-cells = <0x0>;
           pd-id = <0x1e>;
           linux,phandle = <0x10>;
           phandle = <0x10>;
       };

       pd-eth2 {
           #power-domain-cells = <0x0>;
           pd-id = <0x1f>;
           linux,phandle = <0x11>;
           phandle = <0x11>;
       };

       pd-eth3 {
           #power-domain-cells = <0x0>;
           pd-id = <0x20>;
           linux,phandle = <0x12>;
           phandle = <0x12>;
       };

       pd-i2c0 {
           #power-domain-cells = <0x0>;
           pd-id = <0x25>;
           linux,phandle = <0x14>;
           phandle = <0x14>;
       };

       pd-i2c1 {
           #power-domain-cells = <0x0>;
           pd-id = <0x26>;
           linux,phandle = <0x15>;
           phandle = <0x15>;
       };

       pd-dp {
           #power-domain-cells = <0x0>;
           pd-id = <0x29>;
           linux,phandle = <0x2e>;
           phandle = <0x2e>;
       };

       pd-gdma {
           #power-domain-cells = <0x0>;
           pd-id = <0x2a>;
           linux,phandle = <0xa>;
           phandle = <0xa>;
       };

       pd-adma {
           #power-domain-cells = <0x0>;
           pd-id = <0x2b>;
           linux,phandle = <0xc>;
           phandle = <0xc>;
       };

       pd-ttc0 {
           #power-domain-cells = <0x0>;
           pd-id = <0x18>;
           linux,phandle = <0x26>;
           phandle = <0x26>;
       };

       pd-ttc1 {
           #power-domain-cells = <0x0>;
           pd-id = <0x19>;
           linux,phandle = <0x27>;
           phandle = <0x27>;
       };

       pd-ttc2 {
           #power-domain-cells = <0x0>;
           pd-id = <0x1a>;
           linux,phandle = <0x28>;
           phandle = <0x28>;
       };

       pd-ttc3 {
           #power-domain-cells = <0x0>;
           pd-id = <0x1b>;
           linux,phandle = <0x29>;
           phandle = <0x29>;
       };

       pd-sd0 {
           #power-domain-cells = <0x0>;
           pd-id = <0x27>;
           linux,phandle = <0x1d>;
           phandle = <0x1d>;
       };

       pd-sd1 {
           #power-domain-cells = <0x0>;
           pd-id = <0x28>;
           linux,phandle = <0x1e>;
           phandle = <0x1e>;
       };

       pd-nand {
           #power-domain-cells = <0x0>;
           pd-id = <0x2c>;
           linux,phandle = <0xd>;
           phandle = <0xd>;
       };

       pd-qspi {
           #power-domain-cells = <0x0>;
           pd-id = <0x2d>;
           linux,phandle = <0x19>;
           phandle = <0x19>;
       };

       pd-gpio {
           #power-domain-cells = <0x0>;
           pd-id = <0x2e>;
           linux,phandle = <0x13>;
           phandle = <0x13>;
       };

       pd-can0 {
           #power-domain-cells = <0x0>;
           pd-id = <0x2f>;
           linux,phandle = <0x7>;
           phandle = <0x7>;
       };

       pd-can1 {
           #power-domain-cells = <0x0>;
           pd-id = <0x30>;
           linux,phandle = <0x8>;
           phandle = <0x8>;
       };

       pd-pcie {
           #power-domain-cells = <0x0>;
           pd-id = <0x3b>;
           linux,phandle = <0x18>;
           phandle = <0x18>;
       };

       pd-gpu {
           #power-domain-cells = <0x0>;
           pd-id = <0x3a 0x14 0x15>;
           linux,phandle = <0xb>;
           phandle = <0xb>;
       };

       pd_r5_0 {
           #power-domain-cells = <0x0>;
           pd-id = <0x7>;
           linux,phandle = <0x3e>;
           phandle = <0x3e>;
       };

       pd_r5_1 {
           #power-domain-cells = <0x0>;
           pd-id = <0x8>;
           linux,phandle = <0x42>;
           phandle = <0x42>;
       };

       pd_tcm_0_a {
           #power-domain-cells = <0x0>;
           pd-id = <0xf>;
           linux,phandle = <0x35>;
           phandle = <0x35>;
       };

       pd_tcm_0_b {
           #power-domain-cells = <0x0>;
           pd-id = <0x10>;
           linux,phandle = <0x36>;
           phandle = <0x36>;
       };

       pd_tcm_1_a {
           #power-domain-cells = <0x0>;
           pd-id = <0x11>;
           linux,phandle = <0x37>;
           phandle = <0x37>;
       };

       pd_tcm_1_b {
           #power-domain-cells = <0x0>;
           pd-id = <0x12>;
           linux,phandle = <0x38>;
           phandle = <0x38>;
       };

       pd_ocm_0 {
           #power-domain-cells = <0x0>;
           pd-id = <0x13>;
           linux,phandle = <0x39>;
           phandle = <0x39>;
       };
   };

   mailbox@ff990400 {
       compatible = "xlnx,zynqmp-ipi-mailbox";
       reg = <0x0 0xff9905c0 0x0 0x20 0x0 0xff9905e0 0x0 0x20 0x0 0xff990e80 0x0 0x20 0x0 0xff990ea0 0x0 0x20>;
       reg-names = "local_request_region", "local_response_region", "remote_request_region", "remote_response_region";
       #mbox-cells = <0x1>;
       xlnx,ipi-ids = <0x0 0x4>;
       interrupt-parent = <0x4>;
       interrupts = <0x0 0x23 0x4>;
       linux,phandle = <0x5>;
       phandle = <0x5>;
   };

   pmu {
       compatible = "arm,armv8-pmuv3";
       interrupt-parent = <0x4>;
       interrupts = <0x0 0x8f 0x4 0x0 0x90 0x4 0x0 0x91 0x4 0x0 0x92 0x4>;
   };

   psci {
       compatible = "arm,psci-0.2";
       method = "smc";
   };

   firmware {

       zynqmp-firmware {
           compatible = "xlnx,zynqmp-firmware";
           method = "smc";
       };
   };

   zynqmp-power {
       compatible = "xlnx,zynqmp-power";
       mboxes = <0x5 0x0 0x5 0x1>;
       mbox-names = "tx", "rx";
   };

   timer {
       compatible = "arm,armv8-timer";
       interrupt-parent = <0x4>;
       interrupts = <0x1 0xd 0xf08 0x1 0xe 0xf08 0x1 0xb 0xf08 0x1 0xa 0xf08>;
   };

   edac {
       compatible = "arm,cortex-a53-edac";
   };

   fpga-full {
       compatible = "fpga-region";
       fpga-mgr = <0x6>;
       #address-cells = <0x2>;
       #size-cells = <0x2>;
   };

   nvmem_firmware {
       compatible = "xlnx,zynqmp-nvmem-fw";
       #address-cells = <0x1>;
       #size-cells = <0x1>;

       soc_revision@0 {
           reg = <0x0 0x4>;
           linux,phandle = <0x1a>;
           phandle = <0x1a>;
       };
   };

   pcap {
       compatible = "xlnx,zynqmp-pcap-fpga";
       linux,phandle = <0x6>;
       phandle = <0x6>;
   };

   reset-controller {
       compatible = "xlnx,zynqmp-reset";
       #reset-cells = <0x1>;
       linux,phandle = <0x1b>;
       phandle = <0x1b>;
   };

   zynqmp_rsa {
       compatible = "xlnx,zynqmp-rsa";
   };

   sha384 {
       compatible = "xlnx,zynqmp-keccak-384";
   };

   amba_apu@0 {
       compatible = "simple-bus";
       #address-cells = <0x2>;
       #size-cells = <0x1>;
       ranges = <0x0 0x0 0x0 0x0 0xffffffff>;

       interrupt-controller@f9010000 {
           compatible = "arm,gic-400", "arm,cortex-a15-gic";
           #interrupt-cells = <0x3>;
           reg = <0x0 0xf9010000 0x10000 0x0 0xf9020000 0x20000 0x0 0xf9040000 0x20000 0x0 0xf9060000 0x20000>;
           interrupt-controller;
           interrupt-parent = <0x4>;
           interrupts = <0x1 0x9 0xf04>;
           linux,phandle = <0x4>;
           phandle = <0x4>;
       };
   };

   amba {
       compatible = "simple-bus";
       u-boot,dm-pre-reloc;
       #address-cells = <0x2>;
       #size-cells = <0x2>;
       ranges;

       can@ff060000 {
           compatible = "xlnx,zynq-can-1.0";
           status = "disabled";
           clock-names = "can_clk", "pclk";
           reg = <0x0 0xff060000 0x0 0x1000>;
           interrupts = <0x0 0x17 0x4>;
           interrupt-parent = <0x4>;
           tx-fifo-depth = <0x40>;
           rx-fifo-depth = <0x40>;
           power-domains = <0x7>;
           clocks = <0x3 0x3f 0x3 0x1f>;
       };

       can@ff070000 {
           compatible = "xlnx,zynq-can-1.0";
           status = "disabled";
           clock-names = "can_clk", "pclk";
           reg = <0x0 0xff070000 0x0 0x1000>;
           interrupts = <0x0 0x18 0x4>;
           interrupt-parent = <0x4>;
           tx-fifo-depth = <0x40>;
           rx-fifo-depth = <0x40>;
           power-domains = <0x8>;
           clocks = <0x3 0x40 0x3 0x1f>;
       };

       cci@fd6e0000 {
           compatible = "arm,cci-400";
           reg = <0x0 0xfd6e0000 0x0 0x9000>;
           ranges = <0x0 0x0 0xfd6e0000 0x10000>;
           #address-cells = <0x1>;
           #size-cells = <0x1>;

           pmu@9000 {
               compatible = "arm,cci-400-pmu,r1";
               reg = <0x9000 0x5000>;
               interrupt-parent = <0x4>;
               interrupts = <0x0 0x7b 0x4 0x0 0x7b 0x4 0x0 0x7b 0x4 0x0 0x7b 0x4 0x0 0x7b 0x4>;
           };
       };

       dma@fd500000 {
           status = "okay";
           compatible = "xlnx,zynqmp-dma-1.0";
           reg = <0x0 0xfd500000 0x0 0x1000>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x7c 0x4>;
           clock-names = "clk_main", "clk_apb";
           xlnx,bus-width = <0x80>;
           #stream-id-cells = <0x1>;
           iommus = <0x9 0x14e8>;
           power-domains = <0xa>;
           clocks = <0x3 0x13 0x3 0x1f>;
       };

       dma@fd510000 {
           status = "okay";
           compatible = "xlnx,zynqmp-dma-1.0";
           reg = <0x0 0xfd510000 0x0 0x1000>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x7d 0x4>;
           clock-names = "clk_main", "clk_apb";
           xlnx,bus-width = <0x80>;
           #stream-id-cells = <0x1>;
           iommus = <0x9 0x14e9>;
           power-domains = <0xa>;
           clocks = <0x3 0x13 0x3 0x1f>;
       };

       dma@fd520000 {
           status = "okay";
           compatible = "xlnx,zynqmp-dma-1.0";
           reg = <0x0 0xfd520000 0x0 0x1000>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x7e 0x4>;
           clock-names = "clk_main", "clk_apb";
           xlnx,bus-width = <0x80>;
           #stream-id-cells = <0x1>;
           iommus = <0x9 0x14ea>;
           power-domains = <0xa>;
           clocks = <0x3 0x13 0x3 0x1f>;
       };

       dma@fd530000 {
           status = "okay";
           compatible = "xlnx,zynqmp-dma-1.0";
           reg = <0x0 0xfd530000 0x0 0x1000>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x7f 0x4>;
           clock-names = "clk_main", "clk_apb";
           xlnx,bus-width = <0x80>;
           #stream-id-cells = <0x1>;
           iommus = <0x9 0x14eb>;
           power-domains = <0xa>;
           clocks = <0x3 0x13 0x3 0x1f>;
       };

       dma@fd540000 {
           status = "okay";
           compatible = "xlnx,zynqmp-dma-1.0";
           reg = <0x0 0xfd540000 0x0 0x1000>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x80 0x4>;
           clock-names = "clk_main", "clk_apb";
           xlnx,bus-width = <0x80>;
           #stream-id-cells = <0x1>;
           iommus = <0x9 0x14ec>;
           power-domains = <0xa>;
           clocks = <0x3 0x13 0x3 0x1f>;
       };

       dma@fd550000 {
           status = "okay";
           compatible = "xlnx,zynqmp-dma-1.0";
           reg = <0x0 0xfd550000 0x0 0x1000>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x81 0x4>;
           clock-names = "clk_main", "clk_apb";
           xlnx,bus-width = <0x80>;
           #stream-id-cells = <0x1>;
           iommus = <0x9 0x14ed>;
           power-domains = <0xa>;
           clocks = <0x3 0x13 0x3 0x1f>;
       };

       dma@fd560000 {
           status = "okay";
           compatible = "xlnx,zynqmp-dma-1.0";
           reg = <0x0 0xfd560000 0x0 0x1000>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x82 0x4>;
           clock-names = "clk_main", "clk_apb";
           xlnx,bus-width = <0x80>;
           #stream-id-cells = <0x1>;
           iommus = <0x9 0x14ee>;
           power-domains = <0xa>;
           clocks = <0x3 0x13 0x3 0x1f>;
       };

       dma@fd570000 {
           status = "okay";
           compatible = "xlnx,zynqmp-dma-1.0";
           reg = <0x0 0xfd570000 0x0 0x1000>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x83 0x4>;
           clock-names = "clk_main", "clk_apb";
           xlnx,bus-width = <0x80>;
           #stream-id-cells = <0x1>;
           iommus = <0x9 0x14ef>;
           power-domains = <0xa>;
           clocks = <0x3 0x13 0x3 0x1f>;
       };

       gpu@fd4b0000 {
           status = "okay";
           compatible = "arm,mali-400", "arm,mali-utgard";
           reg = <0x0 0xfd4b0000 0x0 0x10000>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4>;
           interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
           clock-names = "gpu", "gpu_pp0", "gpu_pp1";
           power-domains = <0xb>;
           clocks = <0x3 0x18 0x3 0x19 0x3 0x1a>;
       };

       dma@ffa80000 {
           status = "okay";
           compatible = "xlnx,zynqmp-dma-1.0";
           reg = <0x0 0xffa80000 0x0 0x1000>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x4d 0x4>;
           clock-names = "clk_main", "clk_apb";
           xlnx,bus-width = <0x40>;
           #stream-id-cells = <0x1>;
           power-domains = <0xc>;
           clocks = <0x3 0x44 0x3 0x1f>;
       };

       dma@ffa90000 {
           status = "okay";
           compatible = "xlnx,zynqmp-dma-1.0";
           reg = <0x0 0xffa90000 0x0 0x1000>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x4e 0x4>;
           clock-names = "clk_main", "clk_apb";
           xlnx,bus-width = <0x40>;
           #stream-id-cells = <0x1>;
           power-domains = <0xc>;
           clocks = <0x3 0x44 0x3 0x1f>;
       };

       dma@ffaa0000 {
           status = "okay";
           compatible = "xlnx,zynqmp-dma-1.0";
           reg = <0x0 0xffaa0000 0x0 0x1000>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x4f 0x4>;
           clock-names = "clk_main", "clk_apb";
           xlnx,bus-width = <0x40>;
           #stream-id-cells = <0x1>;
           power-domains = <0xc>;
           clocks = <0x3 0x44 0x3 0x1f>;
       };

       dma@ffab0000 {
           status = "okay";
           compatible = "xlnx,zynqmp-dma-1.0";
           reg = <0x0 0xffab0000 0x0 0x1000>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x50 0x4>;
           clock-names = "clk_main", "clk_apb";
           xlnx,bus-width = <0x40>;
           #stream-id-cells = <0x1>;
           power-domains = <0xc>;
           clocks = <0x3 0x44 0x3 0x1f>;
       };

       dma@ffac0000 {
           status = "okay";
           compatible = "xlnx,zynqmp-dma-1.0";
           reg = <0x0 0xffac0000 0x0 0x1000>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x51 0x4>;
           clock-names = "clk_main", "clk_apb";
           xlnx,bus-width = <0x40>;
           #stream-id-cells = <0x1>;
           power-domains = <0xc>;
           clocks = <0x3 0x44 0x3 0x1f>;
       };

       dma@ffad0000 {
           status = "okay";
           compatible = "xlnx,zynqmp-dma-1.0";
           reg = <0x0 0xffad0000 0x0 0x1000>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x52 0x4>;
           clock-names = "clk_main", "clk_apb";
           xlnx,bus-width = <0x40>;
           #stream-id-cells = <0x1>;
           power-domains = <0xc>;
           clocks = <0x3 0x44 0x3 0x1f>;
       };

       dma@ffae0000 {
           status = "okay";
           compatible = "xlnx,zynqmp-dma-1.0";
           reg = <0x0 0xffae0000 0x0 0x1000>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x53 0x4>;
           clock-names = "clk_main", "clk_apb";
           xlnx,bus-width = <0x40>;
           #stream-id-cells = <0x1>;
           power-domains = <0xc>;
           clocks = <0x3 0x44 0x3 0x1f>;
       };

       dma@ffaf0000 {
           status = "okay";
           compatible = "xlnx,zynqmp-dma-1.0";
           reg = <0x0 0xffaf0000 0x0 0x1000>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x54 0x4>;
           clock-names = "clk_main", "clk_apb";
           xlnx,bus-width = <0x40>;
           #stream-id-cells = <0x1>;
           power-domains = <0xc>;
           clocks = <0x3 0x44 0x3 0x1f>;
       };

       memory-controller@fd070000 {
           compatible = "xlnx,zynqmp-ddrc-2.40a";
           reg = <0x0 0xfd070000 0x0 0x30000>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x70 0x4>;
       };

       nand@ff100000 {
           compatible = "arasan,nfc-v3p10";
           status = "disabled";
           reg = <0x0 0xff100000 0x0 0x1000>;
           clock-names = "clk_sys", "clk_flash";
           interrupt-parent = <0x4>;
           interrupts = <0x0 0xe 0x4>;
           #address-cells = <0x1>;
           #size-cells = <0x0>;
           #stream-id-cells = <0x1>;
           iommus = <0x9 0x872>;
           power-domains = <0xd>;
           clocks = <0x3 0x3c 0x3 0x1f>;
       };

       ethernet@ff0b0000 {
           compatible = "cdns,zynqmp-gem";
           status = "okay";
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x39 0x4 0x0 0x39 0x4>;
           reg = <0x0 0xff0b0000 0x0 0x1000>;
           clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
           #address-cells = <0x1>;
           #size-cells = <0x0>;
           #stream-id-cells = <0x1>;
           iommus = <0x9 0x874>;
           power-domains = <0xe>;
           clocks = <0x3 0x1f 0x3 0x31 0x3 0x2d 0x3 0x31 0x3 0x2c>;
           phy-mode = "rgmii-id";
           xlnx,ptp-enet-clock = <0x0>;
           local-mac-address = [00 0a 35 00 22 01];
           phy-handle = <0xf>;

           phy@3 {
               reg = <0x3>;
               rxc-skew-ps = <0x384>;
               txc-skew-ps = <0x708>;
               txen-skew-ps = <0x1a4>;
               rxdv-skew-ps = <0x1a4>;
               rxd0-skew-ps = <0x1a4>;
               rxd1-skew-ps = <0x1a4>;
               rxd2-skew-ps = <0x1a4>;
               rxd3-skew-ps = <0x1a4>;
               txd0-skew-ps = <0x1a4>;
               txd1-skew-ps = <0x1a4>;
               txd2-skew-ps = <0x1a4>;
               txd3-skew-ps = <0x1a4>;
               linux,phandle = <0xf>;
               phandle = <0xf>;
           };
       };

       ethernet@ff0c0000 {
           compatible = "cdns,zynqmp-gem", "cdns,gem";
           status = "disabled";
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x3b 0x4 0x0 0x3b 0x4>;
           reg = <0x0 0xff0c0000 0x0 0x1000>;
           clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
           #address-cells = <0x1>;
           #size-cells = <0x0>;
           #stream-id-cells = <0x1>;
           iommus = <0x9 0x875>;
           power-domains = <0x10>;
           clocks = <0x3 0x1f 0x3 0x32 0x3 0x2e 0x3 0x32 0x3 0x2c>;
       };

       ethernet@ff0d0000 {
           compatible = "cdns,zynqmp-gem", "cdns,gem";
           status = "disabled";
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x3d 0x4 0x0 0x3d 0x4>;
           reg = <0x0 0xff0d0000 0x0 0x1000>;
           clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
           #address-cells = <0x1>;
           #size-cells = <0x0>;
           #stream-id-cells = <0x1>;
           iommus = <0x9 0x876>;
           power-domains = <0x11>;
           clocks = <0x3 0x1f 0x3 0x33 0x3 0x2f 0x3 0x33 0x3 0x2c>;
       };

       ethernet@ff0e0000 {
           compatible = "cdns,zynqmp-gem", "cdns,gem";
           status = "disabled";
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x3f 0x4 0x0 0x3f 0x4>;
           reg = <0x0 0xff0e0000 0x0 0x1000>;
           clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
           #address-cells = <0x1>;
           #size-cells = <0x0>;
           #stream-id-cells = <0x1>;
           iommus = <0x9 0x877>;
           power-domains = <0x12>;
           clocks = <0x3 0x1f 0x3 0x34 0x3 0x30 0x3 0x34 0x3 0x2c>;
       };

       gpio@ff0a0000 {
           compatible = "xlnx,zynqmp-gpio-1.0";
           status = "okay";
           #gpio-cells = <0x2>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x10 0x4>;
           interrupt-controller;
           #interrupt-cells = <0x2>;
           reg = <0x0 0xff0a0000 0x0 0x1000>;
           gpio-controller;
           power-domains = <0x13>;
           clocks = <0x3 0x1f>;
           emio-gpio-width = <0x20>;
           gpio-mask-high = <0x0>;
           gpio-mask-low = <0x5600>;
           linux,phandle = <0x20>;
           phandle = <0x20>;
       };

       i2c@ff020000 {
           compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
           status = "okay";
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x11 0x4>;
           reg = <0x0 0xff020000 0x0 0x1000>;
           #address-cells = <0x1>;
           #size-cells = <0x0>;
           power-domains = <0x14>;
           clocks = <0x3 0x3d>;
           clock-frequency = <0x61a80>;
       };

       i2c@ff030000 {
           compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
           status = "disabled";
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x12 0x4>;
           reg = <0x0 0xff030000 0x0 0x1000>;
           #address-cells = <0x1>;
           #size-cells = <0x0>;
           power-domains = <0x15>;
           clocks = <0x3 0x3e>;
           clock-frequency = <0x61a80>;
       };

       memory-controller@ff960000 {
           compatible = "xlnx,zynqmp-ocmc-1.0";
           reg = <0x0 0xff960000 0x0 0x1000>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0xa 0x4>;
       };

       perf-monitor@ffa00000 {
           compatible = "xlnx,axi-perf-monitor";
           reg = <0x0 0xffa00000 0x0 0x10000>;
           interrupts = <0x0 0x19 0x4>;
           interrupt-parent = <0x4>;
           xlnx,enable-profile = <0x0>;
           xlnx,enable-trace = <0x0>;
           xlnx,num-monitor-slots = <0x1>;
           xlnx,enable-event-count = <0x1>;
           xlnx,enable-event-log = <0x0>;
           xlnx,have-sampled-metric-cnt = <0x1>;
           xlnx,num-of-counters = <0x3>;
           xlnx,metric-count-width = <0x20>;
           xlnx,metrics-sample-count-width = <0x20>;
           xlnx,global-count-width = <0x20>;
           xlnx,metric-count-scale = <0x1>;
           clocks = <0x3 0x1f>;
           xlnx,enable-32bit-filter-id = <0x1>;
           xlnx,enable-advanced = <0x1>;
           xlnx,fifo-axis-depth = <0x20>;
           xlnx,fifo-axis-tdata-width = <0x38>;
           xlnx,fifo-axis-tid-width = <0x1>;
       };

       pcie@fd0e0000 {
           compatible = "xlnx,nwl-pcie-2.11";
           status = "okay";
           #address-cells = <0x3>;
           #size-cells = <0x2>;
           #interrupt-cells = <0x1>;
           msi-controller;
           device_type = "pci";
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x76 0x4 0x0 0x75 0x4 0x0 0x74 0x4 0x0 0x73 0x4 0x0 0x72 0x4>;
           interrupt-names = "misc", "dummy", "intx", "msi1", "msi0";
           msi-parent = <0x16>;
           reg = <0x0 0xfd0e0000 0x0 0x1000 0x0 0xfd480000 0x0 0x1000 0x80 0x0 0x0 0x1000000>;
           reg-names = "breg", "pcireg", "cfg";
           ranges = <0x2000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000 0x43000000 0x6 0x0 0x6 0x0 0x2 0x0>;
           interrupt-map-mask = <0x0 0x0 0x0 0x7>;
           bus-range = <0x0 0xff>;
           interrupt-map = <0x0 0x0 0x0 0x1 0x17 0x1 0x0 0x0 0x0 0x2 0x17 0x2 0x0 0x0 0x0 0x3 0x17 0x3 0x0 0x0 0x0 0x4 0x17 0x4>;
           power-domains = <0x18>;
           clocks = <0x3 0x17>;
           xlnx,pcie-mode = "Root Port";
           linux,phandle = <0x16>;
           phandle = <0x16>;

           legacy-interrupt-controller {
               interrupt-controller;
               #address-cells = <0x0>;
               #interrupt-cells = <0x1>;
               linux,phandle = <0x17>;
               phandle = <0x17>;
           };
       };

       spi@ff0f0000 {
           u-boot,dm-pre-reloc;
           compatible = "xlnx,zynqmp-qspi-1.0";
           status = "disabled";
           clock-names = "ref_clk", "pclk";
           interrupts = <0x0 0xf 0x4>;
           interrupt-parent = <0x4>;
           num-cs = <0x1>;
           reg = <0x0 0xff0f0000 0x0 0x1000 0x0 0xc0000000 0x0 0x8000000>;
           #address-cells = <0x1>;
           #size-cells = <0x0>;
           #stream-id-cells = <0x1>;
           iommus = <0x9 0x873>;
           power-domains = <0x19>;
           clocks = <0x3 0x35 0x3 0x1f>;
           is-dual = <0x0>;
           spi-rx-bus-width = <0x4>;
           spi-tx-bus-width = <0x4>;

           flash@0 {
               compatible = "n25q512a", "micron,m25p80";
               reg = <0x0>;
               #address-cells = <0x1>;
               #size-cells = <0x1>;
               spi-max-frequency = <0x66ff300>;

               partition@0x00000000 {
                   label = "boot";
                   reg = <0x0 0x100000>;
               };

               partition@0x00100000 {
                   label = "bootenv";
                   reg = <0x100000 0x40000>;
               };

               partition@0x00140000 {
                   label = "kernel";
                   reg = <0x140000 0x1600000>;
               };
           };
       };

       rtc@ffa60000 {
           compatible = "xlnx,zynqmp-rtc";
           status = "okay";
           reg = <0x0 0xffa60000 0x0 0x100>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x1a 0x4 0x0 0x1b 0x4>;
           interrupt-names = "alarm", "sec";
           calibration = <0x8000>;
       };

       zynqmp_phy@fd400000 {
           compatible = "xlnx,zynqmp-psgtr-v1.1";
           status = "okay";
           reg = <0x0 0xfd400000 0x0 0x40000 0x0 0xfd3d0000 0x0 0x1000>;
           reg-names = "serdes", "siou";
           nvmem-cells = <0x1a>;
           nvmem-cell-names = "soc_revision";
           resets = <0x1b 0x10 0x1b 0x3b 0x1b 0x3c 0x1b 0x3d 0x1b 0x3e 0x1b 0x3f 0x1b 0x40 0x1b 0x3 0x1b 0x1d 0x1b 0x1e 0x1b 0x1f 0x1b 0x20>;
           reset-names = "sata_rst", "usb0_crst", "usb1_crst", "usb0_hibrst", "usb1_hibrst", "usb0_apbrst", "usb1_apbrst", "dp_rst", "gem0_rst", "gem1_rst", "gem2_rst", "gem3_rst";

           lane0 {
               #phy-cells = <0x4>;
           };

           lane1 {
               #phy-cells = <0x4>;
           };

           lane2 {
               #phy-cells = <0x4>;
           };

           lane3 {
               #phy-cells = <0x4>;
               linux,phandle = <0x30>;
               phandle = <0x30>;
           };
       };

       ahci@fd0c0000 {
           compatible = "ceva,ahci-1v84";
           status = "disabled";
           reg = <0x0 0xfd0c0000 0x0 0x2000>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x85 0x4>;
           power-domains = <0x1c>;
           #stream-id-cells = <0x4>;
           iommus = <0x9 0x4c0 0x9 0x4c1 0x9 0x4c2 0x9 0x4c3>;
           clocks = <0x3 0x16>;
       };

       sdhci@ff160000 {
           u-boot,dm-pre-reloc;
           compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
           status = "okay";
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x30 0x4>;
           reg = <0x0 0xff160000 0x0 0x1000>;
           clock-names = "clk_xin", "clk_ahb";
           xlnx,device_id = <0x0>;
           #stream-id-cells = <0x1>;
           iommus = <0x9 0x870>;
           power-domains = <0x1d>;
           clocks = <0x3 0x36 0x3 0x1f>;
           clock-frequency = <0xb2cfe8d>;
           xlnx,mio_bank = <0x0>;
           non-removable;
           disable-wp;
       };

       sdhci@ff170000 {
           u-boot,dm-pre-reloc;
           compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
           status = "okay";
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x31 0x4>;
           reg = <0x0 0xff170000 0x0 0x1000>;
           clock-names = "clk_xin", "clk_ahb";
           xlnx,device_id = <0x1>;
           #stream-id-cells = <0x1>;
           iommus = <0x9 0x871>;
           power-domains = <0x1e>;
           clocks = <0x3 0x37 0x3 0x1f>;
           clock-frequency = <0x2faee8c>;
           xlnx,mio_bank = <0x1>;
           no-1-8-v;
           wp-inverted;
       };

       pinctrl@ff180000 {
           compatible = "xlnx,zynqmp-pinctrl";
           status = "okay";
           reg = <0x0 0xff180000 0x0 0x1000>;
       };

       smmu@fd800000 {
           compatible = "arm,mmu-500";
           reg = <0x0 0xfd800000 0x0 0x20000>;
           #iommu-cells = <0x1>;
           status = "disabled";
           #global-interrupts = <0x1>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4>;
           linux,phandle = <0x9>;
           phandle = <0x9>;
       };

       spi@ff040000 {
           compatible = "cdns,spi-r1p6";
           status = "okay";
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x13 0x4>;
           reg = <0x0 0xff040000 0x0 0x1000>;
           clock-names = "ref_clk", "pclk";
           #address-cells = <0x1>;
           #size-cells = <0x0>;
           power-domains = <0x1f>;
           clocks = <0x3 0x3a 0x3 0x1f>;
           is-decoded-cs = <0x0>;
           num-cs = <0x3>;

           ad9528-1@1 {
               compatible = "adi,ad9528";
               reg = <0x1>;
               #address-cells = <0x1>;
               #size-cells = <0x0>;
               spi-max-frequency = <0x989680>;
               clock-output-names = "ad9528-1_out0", "ad9528-1_out1", "ad9528-1_out2", "ad9528-1_out3", "ad9528-1_out4", "ad9528-1_out5", "ad9528-1_out6", "ad9528-1_out7", "ad9528-1_out8", "ad9528-1_out9", "ad9528-1_out10", "ad9528-1_out11", "ad9528-1_out12", "ad9528-1_out13";
               #clock-cells = <0x1>;
               adi,vcxo-freq = <0x7530000>;
               adi,refa-enable;
               adi,refa-diff-rcv-enable;
               adi,refa-r-div = <0x1>;
               adi,osc-in-cmos-neg-inp-enable;
               adi,pll1-feedback-div = <0x4>;
               adi,pll1-charge-pump-current-nA = <0x1388>;
               adi,pll2-vco-div-m1 = <0x3>;
               adi,pll2-n2-div = <0xa>;
               adi,pll2-r1-div = <0x1>;
               adi,pll2-charge-pump-current-nA = <0xc4888>;
               adi,sysref-src = <0x2>;
               adi,sysref-pattern-mode = <0x1>;
               adi,sysref-k-div = <0x200>;
               adi,sysref-request-enable;
               adi,sysref-nshot-mode = <0x3>;
               adi,sysref-request-trigger-mode = <0x0>;
               adi,rpole2 = <0x0>;
               adi,rzero = <0x7>;
               adi,cpole1 = <0x2>;
               adi,status-mon-pin0-function-select = <0x1>;
               adi,status-mon-pin1-function-select = <0x7>;
               reset-gpios = <0x20 0x89 0x0>;
               linux,phandle = <0x24>;
               phandle = <0x24>;

               channel@13 {
                   reg = <0xd>;
                   adi,extended-name = "DEV_CLK";
                   adi,driver-mode = <0x0>;
                   adi,divider-phase = <0x0>;
                   adi,channel-divider = <0x5>;
                   adi,signal-source = <0x0>;
               };

               channel@1 {
                   reg = <0x1>;
                   adi,extended-name = "FMC_CLK";
                   adi,driver-mode = <0x0>;
                   adi,divider-phase = <0x0>;
                   adi,channel-divider = <0x5>;
                   adi,signal-source = <0x0>;
               };

               channel@12 {
                   reg = <0xc>;
                   adi,extended-name = "DEV_SYSREF";
                   adi,driver-mode = <0x0>;
                   adi,divider-phase = <0x0>;
                   adi,channel-divider = <0x5>;
                   adi,signal-source = <0x2>;
               };

               channel@3 {
                   reg = <0x3>;
                   adi,extended-name = "FMC_SYSREF";
                   adi,driver-mode = <0x0>;
                   adi,divider-phase = <0x0>;
                   adi,channel-divider = <0x5>;
                   adi,signal-source = <0x2>;
               };
           };

           adrv9009-phy@0 {
               compatible = "adrv9009";
               reg = <0x0>;
               #address-cells = <0x1>;
               #size-cells = <0x0>;
               spi-max-frequency = <0x17d7840>;
               interrupt-parent = <0x20>;
               interrupts = <0x81 0x1>;
               reset-gpios = <0x20 0x82 0x0>;
               test-gpios = <0x20 0x83 0x0>;
               sysref-req-gpios = <0x20 0x88 0x0>;
               rx2-enable-gpios = <0x20 0x84 0x0>;
               rx1-enable-gpios = <0x20 0x85 0x0>;
               tx2-enable-gpios = <0x20 0x86 0x0>;
               tx1-enable-gpios = <0x20 0x87 0x0>;
               clocks = <0x21 0x22 0x23 0x24 0xd 0x24 0x1 0x24 0xc 0x24 0x3>;
               clock-names = "jesd_rx_clk", "jesd_tx_clk", "jesd_rx_os_clk", "dev_clk", "fmc_clk", "sysref_dev_clk", "sysref_fmc_clk";
               clock-output-names = "rx_sampl_clk", "rx_os_sampl_clk", "tx_sampl_clk";
               #clock-cells = <0x1>;
               adi,jesd204-framer-a-bank-id = <0x1>;
               adi,jesd204-framer-a-device-id = <0x0>;
               adi,jesd204-framer-a-lane0-id = <0x0>;
               adi,jesd204-framer-a-m = <0x4>;
               adi,jesd204-framer-a-k = <0x20>;
               adi,jesd204-framer-a-f = <0x4>;
               adi,jesd204-framer-a-np = <0x10>;
               adi,jesd204-framer-a-scramble = <0x1>;
               adi,jesd204-framer-a-external-sysref = <0x1>;
               adi,jesd204-framer-a-serializer-lanes-enabled = <0x3>;
               adi,jesd204-framer-a-serializer-lane-crossbar = <0xe4>;
               adi,jesd204-framer-a-lmfc-offset = <0x1f>;
               adi,jesd204-framer-a-new-sysref-on-relink = <0x0>;
               adi,jesd204-framer-a-syncb-in-select = <0x0>;
               adi,jesd204-framer-a-over-sample = <0x0>;
               adi,jesd204-framer-a-syncb-in-lvds-mode = <0x1>;
               adi,jesd204-framer-a-syncb-in-lvds-pn-invert = <0x0>;
               adi,jesd204-framer-a-enable-manual-lane-xbar = <0x0>;
               adi,jesd204-framer-b-bank-id = <0x0>;
               adi,jesd204-framer-b-device-id = <0x0>;
               adi,jesd204-framer-b-lane0-id = <0x0>;
               adi,jesd204-framer-b-m = <0x4>;
               adi,jesd204-framer-b-k = <0x20>;
               adi,jesd204-framer-b-f = <0x4>;
               adi,jesd204-framer-b-np = <0x10>;
               adi,jesd204-framer-b-scramble = <0x1>;
               adi,jesd204-framer-b-external-sysref = <0x1>;
               adi,jesd204-framer-b-serializer-lanes-enabled = <0xc>;
               adi,jesd204-framer-b-serializer-lane-crossbar = <0xe4>;
               adi,jesd204-framer-b-lmfc-offset = <0x1f>;
               adi,jesd204-framer-b-new-sysref-on-relink = <0x0>;
               adi,jesd204-framer-b-syncb-in-select = <0x1>;
               adi,jesd204-framer-b-over-sample = <0x0>;
               adi,jesd204-framer-b-syncb-in-lvds-mode = <0x1>;
               adi,jesd204-framer-b-syncb-in-lvds-pn-invert = <0x0>;
               adi,jesd204-framer-b-enable-manual-lane-xbar = <0x0>;
               adi,jesd204-deframer-a-bank-id = <0x0>;
               adi,jesd204-deframer-a-device-id = <0x0>;
               adi,jesd204-deframer-a-lane0-id = <0x0>;
               adi,jesd204-deframer-a-m = <0x4>;
               adi,jesd204-deframer-a-k = <0x20>;
               adi,jesd204-deframer-a-scramble = <0x1>;
               adi,jesd204-deframer-a-external-sysref = <0x1>;
               adi,jesd204-deframer-a-deserializer-lanes-enabled = <0xf>;
               adi,jesd204-deframer-a-deserializer-lane-crossbar = <0xe4>;
               adi,jesd204-deframer-a-lmfc-offset = <0x11>;
               adi,jesd204-deframer-a-new-sysref-on-relink = <0x0>;
               adi,jesd204-deframer-a-syncb-out-select = <0x0>;
               adi,jesd204-deframer-a-np = <0x10>;
               adi,jesd204-deframer-a-syncb-out-lvds-mode = <0x1>;
               adi,jesd204-deframer-a-syncb-out-lvds-pn-invert = <0x0>;
               adi,jesd204-deframer-a-syncb-out-cmos-slew-rate = <0x0>;
               adi,jesd204-deframer-a-syncb-out-cmos-drive-level = <0x0>;
               adi,jesd204-deframer-a-enable-manual-lane-xbar = <0x0>;
               adi,jesd204-ser-amplitude = <0xf>;
               adi,jesd204-ser-pre-emphasis = <0x1>;
               adi,jesd204-ser-invert-lane-polarity = <0x0>;
               adi,jesd204-des-invert-lane-polarity = <0x0>;
               adi,jesd204-des-eq-setting = <0x1>;
               adi,jesd204-sysref-lvds-mode = <0x1>;
               adi,jesd204-sysref-lvds-pn-invert = <0x0>;
               adi,rx-profile-rx-fir-gain_db = <0xfffffffa>;
               adi,rx-profile-rx-fir-num-fir-coefs = <0x30>;
               adi,rx-profile-rx-fir-coefs = <0xfffe0017 0x2effef 0xff98000a 0xd00017 0xfe8eff9f 0x25f00f0 0xfc52fe17 0x57f038e 0xf7eff99b 0xbf20bb3 0xecd0e682 0x26d57719 0x771926d5 0xe682ecd0 0xbb30bf2 0xf99bf7ef 0x38e057f 0xfe17fc52 0xf0025f 0xff9ffe8e 0x1700d0 0xaff98 0xffef002e 0x17fffe>;
               adi,rx-profile-rx-fir-decimation = <0x2>;
               adi,rx-profile-rx-dec5-decimation = <0x4>;
               adi,rx-profile-rhb1-decimation = <0x1>;
               adi,rx-profile-rx-output-rate_khz = <0x3c000>;
               adi,rx-profile-rf-bandwidth_hz = <0xbebc200>;
               adi,rx-profile-rx-bbf3d-bcorner_khz = <0x30d40>;
               adi,rx-profile-rx-adc-profile = <0xb6008e 0xad005a 0x50003d6 0x5370060 0x5590030 0x3f40012 0x300030 0x2500d0 0x0 0x0 0x340000 0x70006 0x2a0000 0x70006 0x2a0000 0x19001b 0x0 0x19001b 0x0 0xa5002c 0x1f0389>;
               adi,rx-profile-rx-ddc-mode = <0x0>;
               adi,rx-nco-shifter-band-a-input-band-width_khz = <0x0>;
               adi,rx-nco-shifter-band-a-input-center-freq_khz = <0x0>;
               adi,rx-nco-shifter-band-a-nco1-freq_khz = <0x0>;
               adi,rx-nco-shifter-band-a-nco2-freq_khz = <0x0>;
               adi,rx-nco-shifter-band-binput-band-width_khz = <0x0>;
               adi,rx-nco-shifter-band-binput-center-freq_khz = <0x0>;
               adi,rx-nco-shifter-band-bnco1-freq_khz = <0x0>;
               adi,rx-nco-shifter-band-bnco2-freq_khz = <0x0>;
               adi,rx-gain-control-gain-mode = <0x0>;
               adi,rx-gain-control-rx1-gain-index = <0xff>;
               adi,rx-gain-control-rx2-gain-index = <0xff>;
               adi,rx-gain-control-rx1-max-gain-index = <0xff>;
               adi,rx-gain-control-rx1-min-gain-index = <0xc3>;
               adi,rx-gain-control-rx2-max-gain-index = <0xff>;
               adi,rx-gain-control-rx2-min-gain-index = <0xc3>;
               adi,rx-settings-framer-sel = <0x0>;
               adi,rx-settings-rx-channels = <0x3>;
               adi,orx-profile-rx-fir-gain_db = <0x6>;
               adi,orx-profile-rx-fir-num-fir-coefs = <0x18>;
               adi,orx-profile-rx-fir-coefs = <0xfff60007 0xfff6fff4 0x6fff4 0x10fff0 0x1003f 0xfe514353 0xfe51003f 0x1fff0 0x10fff4 0x6fff4 0xfff60007 0xfff60000>;
               adi,orx-profile-rx-fir-decimation = <0x1>;
               adi,orx-profile-rx-dec5-decimation = <0x4>;
               adi,orx-profile-rhb1-decimation = <0x2>;
               adi,orx-profile-orx-output-rate_khz = <0x3c000>;
               adi,orx-profile-rf-bandwidth_hz = <0xbebc200>;
               adi,orx-profile-rx-bbf3d-bcorner_khz = <0x36ee8>;
               adi,orx-profile-orx-low-pass-adc-profile = <0xb9008d 0xac005a 0x50003ae 0x534005a 0x558002e 0x3f80013 0x300030 0x2500d0 0x0 0x0 0x340000 0x70006 0x2a0000 0x70006 0x2a0000 0x19001b 0x0 0x19001b 0x0 0xa5002c 0x1f0389>;
               adi,orx-profile-orx-band-pass-adc-profile = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
               adi,orx-profile-orx-ddc-mode = <0x0>;
               adi,orx-profile-orx-merge-filter = <0x0 0x0 0x0 0x0 0x0 0x0>;
               adi,orx-gain-control-gain-mode = <0x0>;
               adi,orx-gain-control-orx1-gain-index = <0xff>;
               adi,orx-gain-control-orx2-gain-index = <0xff>;
               adi,orx-gain-control-orx1-max-gain-index = <0xff>;
               adi,orx-gain-control-orx1-min-gain-index = <0xc3>;
               adi,orx-gain-control-orx2-max-gain-index = <0xff>;
               adi,orx-gain-control-orx2-min-gain-index = <0xc3>;
               adi,obs-settings-framer-sel = <0x1>;
               adi,obs-settings-obs-rx-channels-enable = <0x3>;
               adi,obs-settings-obs-rx-lo-source = <0x0>;
               adi,tx-profile-tx-fir-gain_db = <0x6>;
               adi,tx-profile-tx-fir-num-fir-coefs = <0x28>;
               adi,tx-profile-tx-fir-coefs = <0xfff20005 0xfff70006 0xfffc0013 0xffe3001b 0xffe2002e 0xffc1004d 0xff990096 0xff260151 0xfda904f2 0xf5624c51 0xf56204f2 0xfda90151 0xff260096 0xff99004d 0xffc1002e 0xffe2001b 0xffe30013 0xfffc0006 0xfff70005 0xfff20000>;
               adi,tx-profile-dac-div = <0x1>;
               adi,tx-profile-tx-fir-interpolation = <0x1>;
               adi,tx-profile-thb1-interpolation = <0x2>;
               adi,tx-profile-thb2-interpolation = <0x2>;
               adi,tx-profile-thb3-interpolation = <0x2>;
               adi,tx-profile-tx-int5-interpolation = <0x1>;
               adi,tx-profile-tx-input-rate_khz = <0x3c000>;
               adi,tx-profile-primary-sig-bandwidth_hz = <0x5f5e100>;
               adi,tx-profile-rf-bandwidth_hz = <0xd693a40>;
               adi,tx-profile-tx-dac3d-bcorner_khz = <0x36ee8>;
               adi,tx-profile-tx-bbf3d-bcorner_khz = <0x1b968>;
               adi,tx-profile-loop-back-adc-profile = <0xce0084 0xa8005a 0x5000281 0x51b0035 0x54f001c 0x40f001e 0x300030 0x2500d2 0x0 0x0 0x350000 0x70006 0x2a0000 0x70006 0x2a0000 0x19001b 0x0 0x19001b 0x0 0xa5002c 0x1f0389>;
               adi,tx-settings-deframer-sel = <0x0>;
               adi,tx-settings-tx-channels = <0x3>;
               adi,tx-settings-tx-atten-step-size = <0x0>;
               adi,tx-settings-tx1-atten_md-b = <0x2710>;
               adi,tx-settings-tx2-atten_md-b = <0x2710>;
               adi,tx-settings-dis-tx-data-if-pll-unlock = <0x0>;
               adi,dig-clocks-device-clock_khz = <0x3c000>;
               adi,dig-clocks-clk-pll-vco-freq_khz = <0x960000>;
               adi,dig-clocks-clk-pll-hs-div = <0x1>;
               adi,dig-clocks-rf-pll-use-external-lo = <0x0>;
               adi,dig-clocks-rf-pll-phase-sync-mode = <0x0>;
               adi,rxagc-peak-agc-under-range-low-interval_ns = <0xcd>;
               adi,rxagc-peak-agc-under-range-mid-interval = <0x2>;
               adi,rxagc-peak-agc-under-range-high-interval = <0x4>;
               adi,rxagc-peak-apd-high-thresh = <0x27>;
               adi,rxagc-peak-apd-low-gain-mode-high-thresh = <0x24>;
               adi,rxagc-peak-apd-low-thresh = <0x17>;
               adi,rxagc-peak-apd-low-gain-mode-low-thresh = <0x13>;
               adi,rxagc-peak-apd-upper-thresh-peak-exceeded-cnt = <0x6>;
               adi,rxagc-peak-apd-lower-thresh-peak-exceeded-cnt = <0x3>;
               adi,rxagc-peak-apd-gain-step-attack = <0x4>;
               adi,rxagc-peak-apd-gain-step-recovery = <0x2>;
               adi,rxagc-peak-enable-hb2-overload = <0x1>;
               adi,rxagc-peak-hb2-overload-duration-cnt = <0x1>;
               adi,rxagc-peak-hb2-overload-thresh-cnt = <0x4>;
               adi,rxagc-peak-hb2-high-thresh = <0xb5>;
               adi,rxagc-peak-hb2-under-range-low-thresh = <0x2d>;
               adi,rxagc-peak-hb2-under-range-mid-thresh = <0x5a>;
               adi,rxagc-peak-hb2-under-range-high-thresh = <0x80>;
               adi,rxagc-peak-hb2-upper-thresh-peak-exceeded-cnt = <0x6>;
               adi,rxagc-peak-hb2-lower-thresh-peak-exceeded-cnt = <0x3>;
               adi,rxagc-peak-hb2-gain-step-high-recovery = <0x2>;
               adi,rxagc-peak-hb2-gain-step-low-recovery = <0x4>;
               adi,rxagc-peak-hb2-gain-step-mid-recovery = <0x8>;
               adi,rxagc-peak-hb2-gain-step-attack = <0x4>;
               adi,rxagc-peak-hb2-overload-power-mode = <0x1>;
               adi,rxagc-peak-hb2-ovrg-sel = <0x0>;
               adi,rxagc-peak-hb2-thresh-config = <0x3>;
               adi,rxagc-power-power-enable-measurement = <0x1>;
               adi,rxagc-power-power-use-rfir-out = <0x1>;
               adi,rxagc-power-power-use-bbdc2 = <0x0>;
               adi,rxagc-power-under-range-high-power-thresh = <0x9>;
               adi,rxagc-power-under-range-low-power-thresh = <0x2>;
               adi,rxagc-power-under-range-high-power-gain-step-recovery = <0x4>;
               adi,rxagc-power-under-range-low-power-gain-step-recovery = <0x4>;
               adi,rxagc-power-power-measurement-duration = <0x5>;
               adi,rxagc-power-rx1-tdd-power-meas-duration = <0x5>;
               adi,rxagc-power-rx1-tdd-power-meas-delay = <0x1>;
               adi,rxagc-power-rx2-tdd-power-meas-duration = <0x5>;
               adi,rxagc-power-rx2-tdd-power-meas-delay = <0x1>;
               adi,rxagc-power-upper0-power-thresh = <0x2>;
               adi,rxagc-power-upper1-power-thresh = <0x0>;
               adi,rxagc-power-power-log-shift = <0x0>;
               adi,rxagc-agc-peak-wait-time = <0x4>;
               adi,rxagc-agc-rx1-max-gain-index = <0xff>;
               adi,rxagc-agc-rx1-min-gain-index = <0xc3>;
               adi,rxagc-agc-rx2-max-gain-index = <0xff>;
               adi,rxagc-agc-rx2-min-gain-index = <0xc3>;
               adi,rxagc-agc-gain-update-counter_us = <0xfa>;
               adi,rxagc-agc-rx1-attack-delay = <0xa>;
               adi,rxagc-agc-rx2-attack-delay = <0xa>;
               adi,rxagc-agc-slow-loop-settling-delay = <0x10>;
               adi,rxagc-agc-low-thresh-prevent-gain = <0x0>;
               adi,rxagc-agc-change-gain-if-thresh-high = <0x1>;
               adi,rxagc-agc-peak-thresh-gain-control-mode = <0x1>;
               adi,rxagc-agc-reset-on-rxon = <0x0>;
               adi,rxagc-agc-enable-sync-pulse-for-gain-counter = <0x0>;
               adi,rxagc-agc-enable-ip3-optimization-thresh = <0x0>;
               adi,rxagc-ip3-over-range-thresh = <0x1f>;
               adi,rxagc-ip3-over-range-thresh-index = <0xf6>;
               adi,rxagc-ip3-peak-exceeded-cnt = <0x4>;
               adi,rxagc-agc-enable-fast-recovery-loop = <0x0>;
               adi,aux-dac-enables = <0x0>;
               adi,aux-dac-vref0 = <0x3>;
               adi,aux-dac-resolution0 = <0x0>;
               adi,aux-dac-values0 = <0x0>;
               adi,aux-dac-vref1 = <0x3>;
               adi,aux-dac-resolution1 = <0x0>;
               adi,aux-dac-values1 = <0x0>;
               adi,aux-dac-vref2 = <0x3>;
               adi,aux-dac-resolution2 = <0x0>;
               adi,aux-dac-values2 = <0x0>;
               adi,aux-dac-vref3 = <0x3>;
               adi,aux-dac-resolution3 = <0x0>;
               adi,aux-dac-values3 = <0x0>;
               adi,aux-dac-vref4 = <0x3>;
               adi,aux-dac-resolution4 = <0x0>;
               adi,aux-dac-values4 = <0x0>;
               adi,aux-dac-vref5 = <0x3>;
               adi,aux-dac-resolution5 = <0x0>;
               adi,aux-dac-values5 = <0x0>;
               adi,aux-dac-vref6 = <0x3>;
               adi,aux-dac-resolution6 = <0x0>;
               adi,aux-dac-values6 = <0x0>;
               adi,aux-dac-vref7 = <0x3>;
               adi,aux-dac-resolution7 = <0x0>;
               adi,aux-dac-values7 = <0x0>;
               adi,aux-dac-vref8 = <0x3>;
               adi,aux-dac-resolution8 = <0x0>;
               adi,aux-dac-values8 = <0x0>;
               adi,aux-dac-vref9 = <0x3>;
               adi,aux-dac-resolution9 = <0x0>;
               adi,aux-dac-values9 = <0x0>;
               adi,aux-dac-vref10 = <0x3>;
               adi,aux-dac-resolution10 = <0x0>;
               adi,aux-dac-values10 = <0x0>;
               adi,aux-dac-vref11 = <0x3>;
               adi,aux-dac-resolution11 = <0x0>;
               adi,aux-dac-values11 = <0x0>;
               adi,arm-gpio-config-orx1-tx-sel0-pin-gpio-pin-sel = <0x0>;
               adi,arm-gpio-config-orx1-tx-sel0-pin-polarity = <0x0>;
               adi,arm-gpio-config-orx1-tx-sel0-pin-enable = <0x0>;
               adi,arm-gpio-config-orx1-tx-sel1-pin-gpio-pin-sel = <0x0>;
               adi,arm-gpio-config-orx1-tx-sel1-pin-polarity = <0x0>;
               adi,arm-gpio-config-orx1-tx-sel1-pin-enable = <0x0>;
               adi,arm-gpio-config-orx2-tx-sel0-pin-gpio-pin-sel = <0x0>;
               adi,arm-gpio-config-orx2-tx-sel0-pin-polarity = <0x0>;
               adi,arm-gpio-config-orx2-tx-sel0-pin-enable = <0x0>;
               adi,arm-gpio-config-orx2-tx-sel1-pin-gpio-pin-sel = <0x0>;
               adi,arm-gpio-config-orx2-tx-sel1-pin-polarity = <0x0>;
               adi,arm-gpio-config-orx2-tx-sel1-pin-enable = <0x0>;
               adi,arm-gpio-config-en-tx-tracking-cals-gpio-pin-sel = <0x0>;
               adi,arm-gpio-config-en-tx-tracking-cals-polarity = <0x0>;
               adi,arm-gpio-config-en-tx-tracking-cals-enable = <0x0>;
               adi,orx-lo-cfg-disable-aux-pll-relocking = <0x0>;
               adi,orx-lo-cfg-gpio-select = <0x13>;
               adi,fhm-config-fhm-gpio-pin = <0x0>;
               adi,fhm-config-fhm-min-freq_mhz = <0x960>;
               adi,fhm-config-fhm-max-freq_mhz = <0x9c4>;
               adi,fhm-mode-fhm-enable = <0x0>;
               adi,fhm-mode-enable-mcs-sync = <0x0>;
               adi,fhm-mode-fhm-trigger-mode = <0x0>;
               adi,fhm-mode-fhm-exit-mode = <0x1>;
               adi,fhm-mode-fhm-init-frequency_hz = <0x92080880>;
               adi,rx1-gain-ctrl-pin-inc-step = <0x1>;
               adi,rx1-gain-ctrl-pin-dec-step = <0x1>;
               adi,rx1-gain-ctrl-pin-rx-gain-inc-pin = <0x0>;
               adi,rx1-gain-ctrl-pin-rx-gain-dec-pin = <0x1>;
               adi,rx1-gain-ctrl-pin-enable = <0x0>;
               adi,rx2-gain-ctrl-pin-inc-step = <0x1>;
               adi,rx2-gain-ctrl-pin-dec-step = <0x1>;
               adi,rx2-gain-ctrl-pin-rx-gain-inc-pin = <0x3>;
               adi,rx2-gain-ctrl-pin-rx-gain-dec-pin = <0x4>;
               adi,rx2-gain-ctrl-pin-enable = <0x0>;
               adi,tx1-atten-ctrl-pin-step-size = <0x0>;
               adi,tx1-atten-ctrl-pin-tx-atten-inc-pin = <0x4>;
               adi,tx1-atten-ctrl-pin-tx-atten-dec-pin = <0x5>;
               adi,tx1-atten-ctrl-pin-enable = <0x0>;
               adi,tx2-atten-ctrl-pin-step-size = <0x0>;
               adi,tx2-atten-ctrl-pin-tx-atten-inc-pin = <0x6>;
               adi,tx2-atten-ctrl-pin-tx-atten-dec-pin = <0x7>;
               adi,tx2-atten-ctrl-pin-enable = <0x0>;
               adi,tx-pa-protection-avg-duration = <0x3>;
               adi,tx-pa-protection-tx-atten-step = <0x2>;
               adi,tx-pa-protection-tx1-power-threshold = <0x1000>;
               adi,tx-pa-protection-tx2-power-threshold = <0x1000>;
               adi,tx-pa-protection-peak-count = <0x4>;
               adi,tx-pa-protection-tx1-peak-threshold = <0x8c>;
               adi,tx-pa-protection-tx2-peak-threshold = <0x8c>;
               linux,phandle = <0x4f>;
               phandle = <0x4f>;
           };
       };

       spi@ff050000 {
           compatible = "cdns,spi-r1p6";
           status = "okay";
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x14 0x4>;
           reg = <0x0 0xff050000 0x0 0x1000>;
           clock-names = "ref_clk", "pclk";
           #address-cells = <0x1>;
           #size-cells = <0x0>;
           power-domains = <0x25>;
           clocks = <0x3 0x3b 0x3 0x1f>;
           is-decoded-cs = <0x0>;
           num-cs = <0x1>;
       };

       timer@ff110000 {
           compatible = "cdns,ttc";
           status = "disabled";
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
           reg = <0x0 0xff110000 0x0 0x1000>;
           timer-width = <0x20>;
           power-domains = <0x26>;
           clocks = <0x3 0x1f>;
       };

       timer@ff120000 {
           compatible = "cdns,ttc";
           status = "disabled";
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x27 0x4 0x0 0x28 0x4 0x0 0x29 0x4>;
           reg = <0x0 0xff120000 0x0 0x1000>;
           timer-width = <0x20>;
           power-domains = <0x27>;
           clocks = <0x3 0x1f>;
       };

       timer@ff130000 {
           compatible = "cdns,ttc";
           status = "disabled";
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x2a 0x4 0x0 0x2b 0x4 0x0 0x2c 0x4>;
           reg = <0x0 0xff130000 0x0 0x1000>;
           timer-width = <0x20>;
           power-domains = <0x28>;
           clocks = <0x3 0x1f>;
       };

       timer@ff140000 {
           compatible = "cdns,ttc";
           status = "disabled";
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x2d 0x4 0x0 0x2e 0x4 0x0 0x2f 0x4>;
           reg = <0x0 0xff140000 0x0 0x1000>;
           timer-width = <0x20>;
           power-domains = <0x29>;
           clocks = <0x3 0x1f>;
       };

       serial@ff000000 {
           u-boot,dm-pre-reloc;
           compatible = "cdns,uart-r1p12", "xlnx,xuartps";
           status = "okay";
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x15 0x4>;
           reg = <0x0 0xff000000 0x0 0x1000>;
           clock-names = "uart_clk", "pclk";
           power-domains = <0x2a>;
           clocks = <0x3 0x38 0x3 0x1f>;
           device_type = "serial";
           port-number = <0x0>;
       };

       serial@ff010000 {
           u-boot,dm-pre-reloc;
           compatible = "cdns,uart-r1p12", "xlnx,xuartps";
           status = "disabled";
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x16 0x4>;
           reg = <0x0 0xff010000 0x0 0x1000>;
           clock-names = "uart_clk", "pclk";
           power-domains = <0x2b>;
           clocks = <0x3 0x39 0x3 0x1f>;
           device_type = "serial";
           port-number = <0x4>;
       };

       usb0@ff9d0000 {
           #address-cells = <0x2>;
           #size-cells = <0x2>;
           status = "okay";
           compatible = "xlnx,zynqmp-dwc3";
           reg = <0x0 0xff9d0000 0x0 0x100>;
           clock-names = "bus_clk", "ref_clk";
           power-domains = <0x2c>;
           ranges;
           nvmem-cells = <0x1a>;
           nvmem-cell-names = "soc_revision";
           clocks = <0x3 0x20 0x3 0x22>;
           xlnx,usb-reset = <0x2faf080>;

           dwc3@fe200000 {
               compatible = "snps,dwc3";
               status = "okay";
               reg = <0x0 0xfe200000 0x0 0x40000>;
               interrupt-parent = <0x4>;
               interrupts = <0x0 0x41 0x4 0x0 0x45 0x4 0x0 0x4b 0x4>;
               #stream-id-cells = <0x1>;
               iommus = <0x9 0x860>;
               snps,quirk-frame-length-adjustment = <0x20>;
               snps,refclk_fladj;
               snps,enable_guctl1_resume_quirk;
               snps,enable_guctl1_ipd_quirk;
               snps,xhci-stream-quirk;
           };
       };

       usb1@ff9e0000 {
           #address-cells = <0x2>;
           #size-cells = <0x2>;
           status = "okay";
           compatible = "xlnx,zynqmp-dwc3";
           reg = <0x0 0xff9e0000 0x0 0x100>;
           clock-names = "bus_clk", "ref_clk";
           power-domains = <0x2d>;
           ranges;
           nvmem-cells = <0x1a>;
           nvmem-cell-names = "soc_revision";
           clocks = <0x3 0x21 0x3 0x22>;
           xlnx,usb-reset = <0x5>;

           dwc3@fe300000 {
               compatible = "snps,dwc3";
               status = "okay";
               reg = <0x0 0xfe300000 0x0 0x40000>;
               interrupt-parent = <0x4>;
               interrupts = <0x0 0x46 0x4 0x0 0x4a 0x4 0x0 0x4c 0x4>;
               #stream-id-cells = <0x1>;
               iommus = <0x9 0x861>;
               snps,quirk-frame-length-adjustment = <0x20>;
               snps,refclk_fladj;
               snps,enable_guctl1_resume_quirk;
               snps,enable_guctl1_ipd_quirk;
               snps,xhci-stream-quirk;
               maximum-speed = "high-speed";
               snps,dis_u2_susphy_quirk;
               snps,dis_u3_susphy_quirk;
           };
       };

       watchdog@fd4d0000 {
           compatible = "cdns,wdt-r1p2";
           status = "disabled";
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x71 0x1>;
           reg = <0x0 0xfd4d0000 0x0 0x1000>;
           timeout-sec = <0xa>;
           clocks = <0x3 0x4b>;
       };

       ams@ffa50000 {
           compatible = "xlnx,zynqmp-ams";
           status = "okay";
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x38 0x4>;
           interrupt-names = "ams-irq";
           reg = <0x0 0xffa50000 0x0 0x800>;
           reg-names = "ams-base";
           #address-cells = <0x2>;
           #size-cells = <0x2>;
           #io-channel-cells = <0x1>;
           ranges;
           clocks = <0x3 0x46>;

           ams_ps@ffa50800 {
               compatible = "xlnx,zynqmp-ams-ps";
               status = "okay";
               reg = <0x0 0xffa50800 0x0 0x400>;
           };

           ams_pl@ffa50c00 {
               compatible = "xlnx,zynqmp-ams-pl";
               status = "okay";
               reg = <0x0 0xffa50c00 0x0 0x400>;
           };
       };

       dma@fd4c0000 {
           compatible = "xlnx,dpdma";
           status = "okay";
           reg = <0x0 0xfd4c0000 0x0 0x1000>;
           interrupts = <0x0 0x7a 0x4>;
           interrupt-parent = <0x4>;
           clock-names = "axi_clk";
           power-domains = <0x2e>;
           dma-channels = <0x6>;
           #dma-cells = <0x1>;
           clocks = <0x3 0x14>;
           linux,phandle = <0x31>;
           phandle = <0x31>;

           dma-video0channel {
               compatible = "xlnx,video0";
           };

           dma-video1channel {
               compatible = "xlnx,video1";
           };

           dma-video2channel {
               compatible = "xlnx,video2";
           };

           dma-graphicschannel {
               compatible = "xlnx,graphics";
           };

           dma-audio0channel {
               compatible = "xlnx,audio0";
           };

           dma-audio1channel {
               compatible = "xlnx,audio1";
           };
       };

       zynqmp-display@fd4a0000 {
           compatible = "xlnx,zynqmp-dpsub-1.7";
           status = "okay";
           reg = <0x0 0xfd4a0000 0x0 0x1000 0x0 0xfd4aa000 0x0 0x1000 0x0 0xfd4ab000 0x0 0x1000 0x0 0xfd4ac000 0x0 0x1000>;
           reg-names = "dp", "blend", "av_buf", "aud";
           interrupts = <0x0 0x77 0x4>;
           interrupt-parent = <0x4>;
           clock-names = "dp_apb_clk", "dp_aud_clk", "dp_vtc_pixel_clk_in";
           power-domains = <0x2e>;
           clocks = <0x2f 0x3 0x11 0x3 0x10>;
           phy-names = "dp-phy0";
           phys = <0x30 0x5 0x0 0x3 0x19bfcc0>;
           xlnx,max-lanes = <0x1>;

           vid-layer {
               dma-names = "vid0", "vid1", "vid2";
               dmas = <0x31 0x0 0x31 0x1 0x31 0x2>;
           };

           gfx-layer {
               dma-names = "gfx0";
               dmas = <0x31 0x3>;
           };

           i2c-bus {
           };

           zynqmp_dp_snd_codec0 {
               compatible = "xlnx,dp-snd-codec";
               clock-names = "aud_clk";
               clocks = <0x3 0x11>;
               status = "okay";
               linux,phandle = <0x34>;
               phandle = <0x34>;
           };

           zynqmp_dp_snd_pcm0 {
               compatible = "xlnx,dp-snd-pcm";
               dmas = <0x31 0x4>;
               dma-names = "tx";
               status = "okay";
               linux,phandle = <0x32>;
               phandle = <0x32>;
           };

           zynqmp_dp_snd_pcm1 {
               compatible = "xlnx,dp-snd-pcm";
               dmas = <0x31 0x5>;
               dma-names = "tx";
               status = "okay";
               linux,phandle = <0x33>;
               phandle = <0x33>;
           };

           zynqmp_dp_snd_card {
               compatible = "xlnx,dp-snd-card";
               xlnx,dp-snd-pcm = <0x32 0x33>;
               xlnx,dp-snd-codec = <0x34>;
               status = "okay";
           };
       };

       tcm@ffe00000 {
           compatible = "mmio-sram";
           reg = <0x0 0xffe00000 0x0 0x10000>;
           pd-handle = <0x35>;
           linux,phandle = <0x3a>;
           phandle = <0x3a>;
       };

       tcm@ffe20000 {
           compatible = "mmio-sram";
           reg = <0x0 0xffe20000 0x0 0x10000>;
           pd-handle = <0x36>;
           linux,phandle = <0x3b>;
           phandle = <0x3b>;
       };

       tcm@ffe90000 {
           compatible = "mmio-sram";
           reg = <0x0 0xffe90000 0x0 0x10000>;
           pd-handle = <0x37>;
           linux,phandle = <0x3f>;
           phandle = <0x3f>;
       };

       tcm@ffe92000 {
           compatible = "mmio-sram";
           reg = <0x0 0xffeb0000 0x0 0x10000>;
           pd-handle = <0x38>;
           linux,phandle = <0x40>;
           phandle = <0x40>;
       };

       ddr@7fc00000 {
           compatible = "mmio-sram";
           reg = <0x0 0x7fc00000 0x0 0x100000>;
           linux,phandle = <0x3c>;
           phandle = <0x3c>;
       };

       ddr@7fe00000 {
           compatible = "mmio-sram";
           reg = <0x0 0x7fe00000 0x0 0x100000>;
           linux,phandle = <0x41>;
           phandle = <0x41>;
       };

       ocm@fffc0000 {
           compatible = "mmio-sram";
           reg = <0x0 0xfffc0000 0x0 0x40000>;
           pd-handle = <0x39>;
           linux,phandle = <0x3d>;
           phandle = <0x3d>;
       };

       zynqmp_r5_rproc@0 {
           compatible = "xlnx,zynqmp-r5-remoteproc-1.0";
           reg = <0x0 0xff9a0100 0x0 0x100 0x0 0xff340000 0x0 0x100 0x0 0xff9a0000 0x0 0x100>;
           reg-names = "rpu_base", "ipi", "rpu_glbl_base";
           dma-ranges;
           core_conf = "split0";
           srams = <0x3a 0x3b 0x3c 0x3d>;
           pd-handle = <0x3e>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x1d 0x4>;
       };

       zynqmp_r5_rproc@1 {
           compatible = "xlnx,zynqmp-r5-remoteproc-1.0";
           reg = <0x0 0xff9a0200 0x0 0x100 0x0 0xff340000 0x0 0x100 0x0 0xff9a0000 0x0 0x100>;
           reg-names = "rpu_base", "ipi", "rpu_glbl_base";
           dma-ranges;
           core_conf = "split1";
           srams = <0x3f 0x40 0x41>;
           pd-handle = <0x42>;
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x1d 0x4>;
       };
   };

   fclk0 {
       status = "disabled";
       compatible = "xlnx,fclk";
       clocks = <0x3 0x47>;
   };

   fclk1 {
       status = "disabled";
       compatible = "xlnx,fclk";
       clocks = <0x3 0x48>;
   };

   fclk2 {
       status = "disabled";
       compatible = "xlnx,fclk";
       clocks = <0x3 0x49>;
   };

   fclk3 {
       status = "disabled";
       compatible = "xlnx,fclk";
       clocks = <0x3 0x4a>;
   };

   pss_ref_clk {
       u-boot,dm-pre-reloc;
       compatible = "fixed-clock";
       #clock-cells = <0x0>;
       clock-frequency = <0x1fca055>;
       linux,phandle = <0x43>;
       phandle = <0x43>;
   };

   video_clk {
       u-boot,dm-pre-reloc;
       compatible = "fixed-clock";
       #clock-cells = <0x0>;
       clock-frequency = <0x19bfcc0>;
       linux,phandle = <0x44>;
       phandle = <0x44>;
   };

   pss_alt_ref_clk {
       u-boot,dm-pre-reloc;
       compatible = "fixed-clock";
       #clock-cells = <0x0>;
       clock-frequency = <0x0>;
       linux,phandle = <0x45>;
       phandle = <0x45>;
   };

   gt_crx_ref_clk {
       u-boot,dm-pre-reloc;
       compatible = "fixed-clock";
       #clock-cells = <0x0>;
       clock-frequency = <0x66ff300>;
       linux,phandle = <0x47>;
       phandle = <0x47>;
   };

   aux_ref_clk {
       u-boot,dm-pre-reloc;
       compatible = "fixed-clock";
       #clock-cells = <0x0>;
       clock-frequency = <0x19bfcc0>;
       linux,phandle = <0x46>;
       phandle = <0x46>;
   };

   clk {
       u-boot,dm-pre-reloc;
       #clock-cells = <0x1>;
       compatible = "xlnx,zynqmp-clk";
       clocks = <0x43 0x44 0x45 0x46 0x47>;
       clock-names = "pss_ref_clk", "video_clk", "pss_alt_ref_clk", "aux_ref_clk", "gt_crx_ref_clk";
       linux,phandle = <0x3>;
       phandle = <0x3>;
   };

   dp_aclk {
       compatible = "fixed-clock";
       #clock-cells = <0x0>;
       clock-frequency = <0x5f5e100>;
       clock-accuracy = <0x64>;
       linux,phandle = <0x2f>;
       phandle = <0x2f>;
   };

   amba_pl@0 {
       #address-cells = <0x2>;
       #size-cells = <0x2>;
       compatible = "simple-bus";
       ranges;

       axi_clkgen@a0020000 {
           compatible = "adi,axi-clkgen-2.00.a";
           reg = <0x0 0xa0020000 0x0 0x10000>;
           #clock-cells = <0x0>;
           clocks = <0x24 0x1>;
           clock-output-names = "axi_rx_clkgen";
           linux,phandle = <0x48>;
           phandle = <0x48>;
       };

       axi_jesd204_rx@a0014000 {
           compatible = "adi,axi-jesd204-rx-1.0";
           interrupt-names = "irq";
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x6a 0x0>;
           reg = <0x0 0xa0014000 0x0 0x4000>;
           clocks = <0x3 0x47 0x48 0x49 0x0>;
           clock-names = "s_axi_aclk", "device_clk", "lane_clk";
           #clock-cells = <0x0>;
           clock-output-names = "jesd_rx_lane_clk";
           adi,octets-per-frame = <0x4>;
           adi,frames-per-multiframe = <0x20>;
           linux,phandle = <0x21>;
           phandle = <0x21>;
       };

       axi_clkgen@a0030000 {
           compatible = "adi,axi-clkgen-2.00.a";
           reg = <0x0 0xa0030000 0x0 0x10000>;
           #clock-cells = <0x0>;
           clocks = <0x24 0x1>;
           clock-output-names = "axi_rx_os_clkgen";
           linux,phandle = <0x4a>;
           phandle = <0x4a>;
       };

       axi_jesd204_rx@a0018000 {
           compatible = "adi,axi-jesd204-rx-1.0";
           interrupt-names = "irq";
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x68 0x0>;
           reg = <0x0 0xa0018000 0x0 0x4000>;
           clocks = <0x3 0x47 0x4a 0x4b 0x0>;
           clock-names = "s_axi_aclk", "device_clk", "lane_clk";
           #clock-cells = <0x0>;
           clock-output-names = "jesd_rx_os_lane_clk";
           adi,octets-per-frame = <0x4>;
           adi,frames-per-multiframe = <0x20>;
           linux,phandle = <0x23>;
           phandle = <0x23>;
       };

       axi_adxcvr@a0080000 {
           compatible = "adi,axi-adxcvr-1.0";
           reg = <0x0 0xa0080000 0x0 0x10000>;
           #address-cells = <0x1>;
           #size-cells = <0x0>;
           clocks = <0x24 0x1 0x4a>;
           clock-names = "conv", "div40";
           #clock-cells = <0x1>;
           clock-output-names = "rx_os_gt_clk", "rx_os_out_clk";
           adi,sys-clk-select = <0x0>;
           adi,out-clk-select = <0x3>;
           adi,use-lpm-enable;
           adi,use-cpll-enable;
           linux,phandle = <0x4b>;
           phandle = <0x4b>;
       };

       axi_adxcvr@a0090000 {
           compatible = "adi,axi-adxcvr-1.0";
           reg = <0x0 0xa0090000 0x0 0x10000>;
           #address-cells = <0x1>;
           #size-cells = <0x0>;
           clocks = <0x24 0x1 0x48 0x0>;
           clock-names = "conv", "div40";
           #clock-cells = <0x1>;
           clock-output-names = "rx_gt_clk", "rx_out_clk";
           adi,sys-clk-select = <0x0>;
           adi,out-clk-select = <0x3>;
           adi,use-lpm-enable;
           adi,use-cpll-enable;
           linux,phandle = <0x49>;
           phandle = <0x49>;
       };

       axi_clkgen@a00a0000 {
           compatible = "adi,axi-clkgen-2.00.a";
           reg = <0x0 0xa00a0000 0x0 0x10000>;
           #clock-cells = <0x0>;
           clocks = <0x24 0x1>;
           clock-output-names = "axi_tx_clkgen";
           linux,phandle = <0x4c>;
           phandle = <0x4c>;
       };

       axi_jesd204_tx@a001c000 {
           compatible = "adi,axi-jesd204-tx-1.0";
           interrupt-names = "irq";
           interrupt-parent = <0x4>;
           interrupts = <0x0 0x69 0x0>;
           reg = <0x0 0xa001c000 0x0 0x4000>;
           clocks = <0x3 0x47 0x4c 0x4d 0x0>;
           clock-names = "s_axi_aclk", "device_clk", "lane_clk";
           #clock-cells = <0x0>;
           clock-output-names = "jesd_tx_lane_clk";
           adi,octets-per-frame = <0x2>;
           adi,frames-per-multiframe = <0x20>;
           adi,converter-resolution = <0xe>;
           adi,bits-per-sample = <0x10>;
           adi,converters-per-device = <0x4>;
           adi,control-bits-per-sample = <0x2>;
           linux,phandle = <0x22>;
           phandle = <0x22>;
       };

       axi_adxcvr@a00b0000 {
           compatible = "adi,axi-adxcvr-1.0";
           reg = <0x0 0xa00b0000 0x0 0x10000>;
           #address-cells = <0x1>;
           #size-cells = <0x0>;
           clocks = <0x24 0x1 0x4c>;
           clock-names = "conv", "div40";
           #clock-cells = <0x1>;
           clock-output-names = "tx_gt_clk", "tx_out_clk";
           adi,sys-clk-select = <0x3>;
           adi,out-clk-select = <0x3>;
           linux,phandle = <0x4d>;
           phandle = <0x4d>;
       };

       axi_ddc_controller@a0001000 {
           compatible = "generic-uio";
           reg = <0x0 0xa0001000 0x0 0x1000>;
           xlnx,num-ddcs = <0x20>;
           xlnx,s00-axi-addr-width = <0x6>;
           xlnx,s00-axi-aruser-width = <0x0>;
           xlnx,s00-axi-awuser-width = <0x0>;
           xlnx,s00-axi-buser-width = <0x0>;
           xlnx,s00-axi-data-width = <0x20>;
           xlnx,s00-axi-id-width = <0x0>;
           xlnx,s00-axi-ruser-width = <0x0>;
           xlnx,s00-axi-wuser-width = <0x0>;
           status = "okay";
       };

       axi_fabric_bridge@a0004000 {
           compatible = "generic-uio";
           reg = <0x0 0xa0004000 0x0 0x4000>;
           xlnx,s00-axi-addr-width = <0xe>;
           xlnx,s00-axi-aruser-width = <0x0>;
           xlnx,s00-axi-awuser-width = <0x0>;
           xlnx,s00-axi-buser-width = <0x0>;
           xlnx,s00-axi-data-width = <0x20>;
           xlnx,s00-axi-id-width = <0x0>;
           xlnx,s00-axi-ruser-width = <0x0>;
           xlnx,s00-axi-wuser-width = <0x0>;
           status = "okay";
       };

       axi_fabric_bridge@a0008000 {
           compatible = "generic-uio";
           reg = <0x0 0xa0008000 0x0 0x4000>;
           xlnx,s00-axi-addr-width = <0xe>;
           xlnx,s00-axi-aruser-width = <0x0>;
           xlnx,s00-axi-awuser-width = <0x0>;
           xlnx,s00-axi-buser-width = <0x0>;
           xlnx,s00-axi-data-width = <0x20>;
           xlnx,s00-axi-id-width = <0x0>;
           xlnx,s00-axi-ruser-width = <0x0>;
           xlnx,s00-axi-wuser-width = <0x0>;
           status = "okay";
       };

       axi_register@a0000000 {
           compatible = "generic-uio";
           reg = <0x0 0xa0000000 0x0 0x1000>;
           xlnx,s00-axi-addr-width = <0x7>;
           xlnx,s00-axi-data-width = <0x20>;
           status = "okay";
       };

       axi_sdram_manager@a0040000 {
           compatible = "generic-uio";
           reg = <0x0 0xa0040000 0x0 0x40000>;
           xlnx,data-bus-width = <0x200>;
           xlnx,s00-axi-addr-width = <0x12>;
           xlnx,s00-axi-aruser-width = <0x10>;
           xlnx,s00-axi-awuser-width = <0x10>;
           xlnx,s00-axi-buser-width = <0x0>;
           xlnx,s00-axi-data-width = <0x80>;
           xlnx,s00-axi-id-width = <0x10>;
           xlnx,s00-axi-ruser-width = <0x0>;
           xlnx,s00-axi-wuser-width = <0x0>;
           status = "okay";
       };

       axi_sdram_manager_control@a000c000 {
           compatible = "generic-uio";
           reg = <0x0 0xa000c000 0x0 0x1000>;
           xlnx,fifo-input-chan = <0x10>;
           xlnx,fifo-input-chan-bits = <0x6>;
           xlnx,pkt-address-bits = <0x15>;
           xlnx,s00-axi-addr-width = <0x6>;
           xlnx,s00-axi-data-width = <0x20>;
           status = "okay";
       };

       axi_to_fabric_fifo@a0002000 {
           compatible = "generic-uio";
           reg = <0x0 0xa0002000 0x0 0x1000>;
           xlnx,s00-axi-addr-width = <0x6>;
           xlnx,s00-axi-aruser-width = <0x0>;
           xlnx,s00-axi-awuser-width = <0x0>;
           xlnx,s00-axi-buser-width = <0x0>;
           xlnx,s00-axi-data-width = <0x20>;
           xlnx,s00-axi-id-width = <0x0>;
           xlnx,s00-axi-ruser-width = <0x0>;
           xlnx,s00-axi-wuser-width = <0x0>;
           status = "okay";
       };

       axi_to_fabric_fifo@a000d000 {
           compatible = "generic-uio";
           reg = <0x0 0xa000d000 0x0 0x1000>;
           xlnx,s00-axi-addr-width = <0x6>;
           xlnx,s00-axi-aruser-width = <0x0>;
           xlnx,s00-axi-awuser-width = <0x0>;
           xlnx,s00-axi-buser-width = <0x0>;
           xlnx,s00-axi-data-width = <0x20>;
           xlnx,s00-axi-id-width = <0x0>;
           xlnx,s00-axi-ruser-width = <0x0>;
           xlnx,s00-axi-wuser-width = <0x0>;
           status = "okay";
       };

       serial@b0009000 {
           clock-names = "s_axi_aclk";
           clocks = <0x3 0x47>;
           compatible = "xlnx,xps-uartlite-1.00.a";
           current-speed = <0x2580>;
           device_type = "serial";
           port-number = <0x1>;
           reg = <0x0 0xb0009000 0x0 0x1000>;
           xlnx,baudrate = <0x2580>;
           xlnx,data-bits = <0x8>;
           xlnx,odd-parity = <0x0>;
           xlnx,s-axi-aclk-freq-hz-d = "149.9985";
           xlnx,use-parity = <0x0>;
       };

       fabric_to_axi_fifo@a0003000 {
           compatible = "generic-uio";
           reg = <0x0 0xa0003000 0x0 0x1000>;
           xlnx,s00-axi-addr-width = <0xc>;
           xlnx,s00-axi-aruser-width = <0x0>;
           xlnx,s00-axi-awuser-width = <0x0>;
           xlnx,s00-axi-buser-width = <0x0>;
           xlnx,s00-axi-data-width = <0x20>;
           xlnx,s00-axi-id-width = <0x0>;
           xlnx,s00-axi-ruser-width = <0x0>;
           xlnx,s00-axi-wuser-width = <0x0>;
           status = "okay";
       };

       fabric_to_axi_fifo@a000e000 {
           compatible = "generic-uio";
           reg = <0x0 0xa000e000 0x0 0x1000>;
           xlnx,s00-axi-addr-width = <0xc>;
           xlnx,s00-axi-aruser-width = <0x0>;
           xlnx,s00-axi-awuser-width = <0x0>;
           xlnx,s00-axi-buser-width = <0x0>;
           xlnx,s00-axi-data-width = <0x20>;
           xlnx,s00-axi-id-width = <0x0>;
           xlnx,s00-axi-ruser-width = <0x0>;
           xlnx,s00-axi-wuser-width = <0x0>;
           status = "okay";
       };

       AxiPPSCounterCoarse@b0002000 {
           compatible = "xlnx,AxiPPSCounterCoarse-1.0";
           reg = <0x0 0xb0002000 0x0 0x1000>;
           xlnx,s00-axi-addr-width = <0x4>;
           xlnx,s00-axi-data-width = <0x20>;
           status = "disabled";
       };

       AxiPPSCounterFine@b0003000 {
           compatible = "xlnx,AxiPPSCounterFine-1.0";
           reg = <0x0 0xb0003000 0x0 0x1000>;
           xlnx,s00-axi-addr-width = <0x4>;
           xlnx,s00-axi-data-width = <0x20>;
           status = "disabled";
       };

       TimestampManager@b0004000 {
           compatible = "xlnx,TimestampManager-0.1";
           reg = <0x0 0xb0004000 0x0 0x1000>;
           xlnx,s00-axi-addr-width = <0x4>;
           xlnx,s00-axi-data-width = <0x20>;
           status = "disabled";
       };

       axi_mdio@b0005000 {
           compatible = "xlnx,axi-mdio-1.0";
           reg = <0x0 0xb0005000 0x0 0x1000>;
           xlnx,s00-axi-addr-width = <0x4>;
           xlnx,s00-axi-data-width = <0x20>;
           status = "disabled";
       };

       axi_register@b0006000 {
           compatible = "xlnx,axi-register-1.0";
           reg = <0x0 0xb0006000 0x0 0x1000>;
           xlnx,s00-axi-addr-width = <0x7>;
           xlnx,s00-axi-data-width = <0x20>;
           status = "disabled";
       };

       axi_to_fabric_fifo@b0000000 {
           compatible = "xlnx,axi-to-fabric-fifo-1.0";
           reg = <0x0 0xb0000000 0x0 0x1000>;
           xlnx,s00-axi-addr-width = <0x6>;
           xlnx,s00-axi-aruser-width = <0x0>;
           xlnx,s00-axi-awuser-width = <0x0>;
           xlnx,s00-axi-buser-width = <0x0>;
           xlnx,s00-axi-data-width = <0x20>;
           xlnx,s00-axi-id-width = <0x0>;
           xlnx,s00-axi-ruser-width = <0x0>;
           xlnx,s00-axi-wuser-width = <0x0>;
           status = "disabled";
       };

       serial@b0007000 {
           clock-names = "s_axi_aclk";
           clocks = <0x3 0x47>;
           compatible = "xlnx,xps-uartlite-1.00.a";
           current-speed = <0x1c200>;
           device_type = "serial";
           port-number = <0x2>;
           reg = <0x0 0xb0007000 0x0 0x1000>;
           xlnx,baudrate = <0x1c200>;
           xlnx,data-bits = <0x8>;
           xlnx,odd-parity = <0x0>;
           xlnx,s-axi-aclk-freq-hz-d = "149.9985";
           xlnx,use-parity = <0x0>;
           status = "disabled";
       };

       serial@b0008000 {
           clock-names = "s_axi_aclk";
           clocks = <0x3 0x47>;
           compatible = "xlnx,xps-uartlite-1.00.a";
           current-speed = <0x1c200>;
           device_type = "serial";
           port-number = <0x3>;
           reg = <0x0 0xb0008000 0x0 0x1000>;
           xlnx,baudrate = <0x1c200>;
           xlnx,data-bits = <0x8>;
           xlnx,odd-parity = <0x0>;
           xlnx,s-axi-aclk-freq-hz-d = "149.9985";
           xlnx,use-parity = <0x0>;
           status = "disabled";
       };

       fabric_to_axi_fifo@b0001000 {
           compatible = "xlnx,fabric-to-axi-fifo-1.0";
           reg = <0x0 0xb0001000 0x0 0x1000>;
           xlnx,s00-axi-addr-width = <0xc>;
           xlnx,s00-axi-aruser-width = <0x0>;
           xlnx,s00-axi-awuser-width = <0x0>;
           xlnx,s00-axi-buser-width = <0x0>;
           xlnx,s00-axi-data-width = <0x20>;
           xlnx,s00-axi-id-width = <0x0>;
           xlnx,s00-axi-ruser-width = <0x0>;
           xlnx,s00-axi-wuser-width = <0x0>;
           status = "disabled";
       };

       system_management_wiz@b000c000 {
           compatible = "xlnx,system-management-wiz-1.3";
           reg = <0x0 0xb000c000 0x0 0x2000>;
           xlnx,alarm-limit-r0 = <0xb794>;
           xlnx,alarm-limit-r1 = <0x4e81>;
           xlnx,alarm-limit-r10 = <0x4963>;
           xlnx,alarm-limit-r11 = <0x451e>;
           xlnx,alarm-limit-r12 = <0x4963>;
           xlnx,alarm-limit-r13 = <0x451e>;
           xlnx,alarm-limit-r14 = <0x9a74>;
           xlnx,alarm-limit-r15 = <0x91eb>;
           xlnx,alarm-limit-r2 = <0xa147>;
           xlnx,alarm-limit-r3 = <0xcba3>;
           xlnx,alarm-limit-r4 = <0xab03>;
           xlnx,alarm-limit-r5 = <0x4963>;
           xlnx,alarm-limit-r6 = <0x9555>;
           xlnx,alarm-limit-r7 = <0xb00a>;
           xlnx,alarm-limit-r8 = <0x4e81>;
           xlnx,alarm-limit-r9 = <0x4963>;
           xlnx,alarm-limit-slave0-ssit-usl1 = <0x4c5e>;
           xlnx,alarm-limit-slave0-ssit-usl2 = <0x4bf2>;
           xlnx,alarm-limit-slave0-ssit-usl3 = <0x98bf>;
           xlnx,alarm-limit-slave0-ssit-usl4 = <0x98bf>;
           xlnx,alarm-limit-slave0-ssit-usu1 = <0x4d39>;
           xlnx,alarm-limit-slave0-ssit-usu2 = <0x4da7>;
           xlnx,alarm-limit-slave0-ssit-usu3 = <0x9a74>;
           xlnx,alarm-limit-slave0-ssit-usu4 = <0x9a74>;
           xlnx,alarm-limit-slave1-ssit-usl1 = <0x4c5e>;
           xlnx,alarm-limit-slave1-ssit-usl2 = <0x4bf2>;
           xlnx,alarm-limit-slave1-ssit-usl3 = <0x98bf>;
           xlnx,alarm-limit-slave1-ssit-usl4 = <0x98bf>;
           xlnx,alarm-limit-slave1-ssit-usu1 = <0x4d39>;
           xlnx,alarm-limit-slave1-ssit-usu2 = <0x4da7>;
           xlnx,alarm-limit-slave1-ssit-usu3 = <0x9a74>;
           xlnx,alarm-limit-slave1-ssit-usu4 = <0x9a74>;
           xlnx,alarm-limit-slave2-ssit-usl1 = <0x4c5e>;
           xlnx,alarm-limit-slave2-ssit-usl2 = <0x4bf2>;
           xlnx,alarm-limit-slave2-ssit-usl3 = <0x98bf>;
           xlnx,alarm-limit-slave2-ssit-usl4 = <0x98bf>;
           xlnx,alarm-limit-slave2-ssit-usu1 = <0x4d39>;
           xlnx,alarm-limit-slave2-ssit-usu2 = <0x4da7>;
           xlnx,alarm-limit-slave2-ssit-usu3 = <0x9a74>;
           xlnx,alarm-limit-slave2-ssit-usu4 = <0x9a74>;
           xlnx,alarm-limit-usl1 = <0x4c5e>;
           xlnx,alarm-limit-usl2 = <0x4bf2>;
           xlnx,alarm-limit-usl3 = <0x98bf>;
           xlnx,alarm-limit-usl4 = <0x98bf>;
           xlnx,alarm-limit-usu1 = <0x4d39>;
           xlnx,alarm-limit-usu2 = <0x4da7>;
           xlnx,alarm-limit-usu3 = <0x9a74>;
           xlnx,alarm-limit-usu4 = <0x9a74>;
           xlnx,average-en-slave0-ssit-vuser0 = <0x0>;
           xlnx,average-en-slave0-ssit-vuser1 = <0x0>;
           xlnx,average-en-slave0-ssit-vuser2 = <0x0>;
           xlnx,average-en-slave0-ssit-vuser3 = <0x0>;
           xlnx,average-en-slave1-ssit-vuser0 = <0x0>;
           xlnx,average-en-slave1-ssit-vuser1 = <0x0>;
           xlnx,average-en-slave1-ssit-vuser2 = <0x0>;
           xlnx,average-en-slave1-ssit-vuser3 = <0x0>;
           xlnx,average-en-slave2-ssit-vuser0 = <0x0>;
           xlnx,average-en-slave2-ssit-vuser1 = <0x0>;
           xlnx,average-en-slave2-ssit-vuser2 = <0x0>;
           xlnx,average-en-slave2-ssit-vuser3 = <0x0>;
           xlnx,average-en-vuser0 = <0x0>;
           xlnx,average-en-vuser1 = <0x0>;
           xlnx,average-en-vuser2 = <0x0>;
           xlnx,average-en-vuser3 = <0x0>;
           xlnx,avg-slave0-ssit-vuser = <0x0>;
           xlnx,avg-slave1-ssit-vuser = <0x0>;
           xlnx,avg-slave2-ssit-vuser = <0x0>;
           xlnx,avg-vuser = <0x0>;
           xlnx,channel-cnt = <0x8>;
           xlnx,common-n-source = "Null";
           xlnx,configuration-r0 = <0x2000>;
           xlnx,configuration-r1 = <0x2f90>;
           xlnx,configuration-r2 = <0x1400>;
           xlnx,configuration-r3 = <0xf>;
           xlnx,configuration-r4 = <0x0>;
           xlnx,configuration-r4-1 = <0xc>;
           xlnx,configuration-r4-2 = <0xc>;
           xlnx,configuration-r4-3 = <0xe>;
           xlnx,configuration-r4-4 = <0xa>;
           xlnx,configuration-slave0-ssit-r3 = <0xf>;
           xlnx,configuration-slave0-ssit-r4-1 = <0xc>;
           xlnx,configuration-slave0-ssit-r4-2 = <0xc>;
           xlnx,configuration-slave0-ssit-r4-3 = <0xe>;
           xlnx,configuration-slave0-ssit-r4-4 = <0xa>;
           xlnx,configuration-slave1-ssit-r3 = <0xf>;
           xlnx,configuration-slave1-ssit-r4-1 = <0xc>;
           xlnx,configuration-slave1-ssit-r4-2 = <0xc>;
           xlnx,configuration-slave1-ssit-r4-3 = <0xe>;
           xlnx,configuration-slave1-ssit-r4-4 = <0xa>;
           xlnx,configuration-slave2-ssit-r3 = <0xf>;
           xlnx,configuration-slave2-ssit-r4-1 = <0xc>;
           xlnx,configuration-slave2-ssit-r4-2 = <0xc>;
           xlnx,configuration-slave2-ssit-r4-3 = <0xe>;
           xlnx,configuration-slave2-ssit-r4-4 = <0xa>;
           xlnx,dclk-frequency = <0x64>;
           xlnx,div-vuser0 = <0x6>;
           xlnx,div-vuser0-slave0 = <0x6>;
           xlnx,div-vuser0-slave1 = <0x6>;
           xlnx,div-vuser0-slave2 = <0x6>;
           xlnx,div-vuser1 = <0x3>;
           xlnx,div-vuser1-slave0 = <0x3>;
           xlnx,div-vuser1-slave1 = <0x3>;
           xlnx,div-vuser1-slave2 = <0x3>;
           xlnx,div-vuser2 = <0x3>;
           xlnx,div-vuser2-slave0 = <0x3>;
           xlnx,div-vuser2-slave1 = <0x3>;
           xlnx,div-vuser2-slave2 = <0x3>;
           xlnx,div-vuser3 = <0x3>;
           xlnx,div-vuser3-slave0 = <0x3>;
           xlnx,div-vuser3-slave1 = <0x3>;
           xlnx,div-vuser3-slave2 = <0x3>;
           xlnx,dual-seq = <0x0>;
           xlnx,dual-sequence-r0 = <0x0>;
           xlnx,dual-sequence-r1 = <0x0>;
           xlnx,dual-sequence-r2 = <0x0>;
           xlnx,dual0-register = <0x0>;
           xlnx,dual1-register = <0x0>;
           xlnx,dual2-register = <0x0>;
           xlnx,dual3-register = <0x0>;
           xlnx,enable-adc-data-out-master = <0x0>;
           xlnx,enable-adc-data-out-slave0 = <0x0>;
           xlnx,enable-adc-data-out-slave1 = <0x0>;
           xlnx,enable-adc-data-out-slave2 = <0x0>;
           xlnx,enable-dual-sequence-mode = <0x0>;
           xlnx,enable-slave0 = <0x0>;
           xlnx,enable-slave1 = <0x0>;
           xlnx,enable-slave2 = <0x0>;
           xlnx,external-mux-channel = "VP_VN";
           xlnx,external-muxaddr-enable = <0x0>;
           xlnx,fifo-depth = <0x7>;
           xlnx,has-axi = <0x1>;
           xlnx,has-axi4stream = <0x0>;
           xlnx,has-busy = <0x1>;
           xlnx,has-channel = <0x1>;
           xlnx,has-convst = <0x0>;
           xlnx,has-convstclk = <0x0>;
           xlnx,has-dclk = <0x1>;
           xlnx,has-drp = <0x0>;
           xlnx,has-eoc = <0x1>;
           xlnx,has-eos = <0x1>;
           xlnx,has-external-mux = <0x0>;
           xlnx,has-i2c = <0x0>;
           xlnx,has-i2c-slave = <0x0>;
           xlnx,has-jtagbusy = <0x0>;
           xlnx,has-jtaglocked = <0x0>;
           xlnx,has-jtagmodified = <0x0>;
           xlnx,has-ot-alarm = <0x1>;
           xlnx,has-pmbus = <0x0>;
           xlnx,has-pmc = <0x0>;
           xlnx,has-pmc-master = <0x0>;
           xlnx,has-reset = <0x0>;
           xlnx,has-slave0-ssit-temp-ch = <0x1>;
           xlnx,has-slave0-ssit-vuser0 = <0x0>;
           xlnx,has-slave0-ssit-vuser1 = <0x0>;
           xlnx,has-slave0-ssit-vuser2 = <0x0>;
           xlnx,has-slave0-ssit-vuser3 = <0x0>;
           xlnx,has-slave1-ssit-temp-ch = <0x1>;
           xlnx,has-slave1-ssit-vuser0 = <0x0>;
           xlnx,has-slave1-ssit-vuser1 = <0x0>;
           xlnx,has-slave1-ssit-vuser2 = <0x0>;
           xlnx,has-slave1-ssit-vuser3 = <0x0>;
           xlnx,has-slave2-ssit-temp-ch = <0x1>;
           xlnx,has-slave2-ssit-vuser0 = <0x0>;
           xlnx,has-slave2-ssit-vuser1 = <0x0>;
           xlnx,has-slave2-ssit-vuser2 = <0x0>;
           xlnx,has-slave2-ssit-vuser3 = <0x0>;
           xlnx,has-temp-bus = <0x0>;
           xlnx,has-under-ot-alarm = <0x0>;
           xlnx,has-under-temp-alarm = <0x0>;
           xlnx,has-user-supply0-alarm = <0x0>;
           xlnx,has-user-supply0-slave0-ssit-alarm = <0x0>;
           xlnx,has-user-supply0-slave1-ssit-alarm = <0x0>;
           xlnx,has-user-supply0-slave2-ssit-alarm = <0x0>;
           xlnx,has-user-supply1-alarm = <0x0>;
           xlnx,has-user-supply1-slave0-ssit-alarm = <0x0>;
           xlnx,has-user-supply1-slave1-ssit-alarm = <0x0>;
           xlnx,has-user-supply1-slave2-ssit-alarm = <0x0>;
           xlnx,has-user-supply2-alarm = <0x0>;
           xlnx,has-user-supply2-slave0-ssit-alarm = <0x0>;
           xlnx,has-user-supply2-slave1-ssit-alarm = <0x0>;
           xlnx,has-user-supply2-slave2-ssit-alarm = <0x0>;
           xlnx,has-user-supply3-alarm = <0x0>;
           xlnx,has-user-supply3-slave0-ssit-alarm = <0x0>;
           xlnx,has-user-supply3-slave1-ssit-alarm = <0x0>;
           xlnx,has-user-supply3-slave2-ssit-alarm = <0x0>;
           xlnx,has-user-temp-alarm = <0x1>;
           xlnx,has-vbram-alarm = <0x0>;
           xlnx,has-vccaux-alarm = <0x1>;
           xlnx,has-vccddro-alarm = <0x0>;
           xlnx,has-vccint-alarm = <0x1>;
           xlnx,has-vccpaux-alarm = <0x0>;
           xlnx,has-vccpint-alarm = <0x0>;
           xlnx,has-vccpsaux-alarm = <0x0>;
           xlnx,has-vccpsintfp-alarm = <0x0>;
           xlnx,has-vccpsintlp-alarm = <0x0>;
           xlnx,has-vn = <0x1>;
           xlnx,has-vp = <0x1>;
           xlnx,has-vuser0 = <0x0>;
           xlnx,has-vuser1 = <0x0>;
           xlnx,has-vuser2 = <0x0>;
           xlnx,has-vuser3 = <0x0>;
           xlnx,i2c-clk-period = "2500.000";
           xlnx,i2c-sclk-loc = "AA3";
           xlnx,i2c-sda-loc = "AA1";
           xlnx,i2c-slave-address = <0x20>;
           xlnx,i2c-slave0-address = <0x20>;
           xlnx,i2c-slave1-address = <0x20>;
           xlnx,i2c-slave2-address = <0x20>;
           xlnx,include-intr = <0x1>;
           xlnx,is-diablo = <0x1>;
           xlnx,is-ssit-slave0 = <0x0>;
           xlnx,is-ssit-slave0-analog-bank = <0x0>;
           xlnx,is-ssit-slave1 = <0x0>;
           xlnx,is-ssit-slave1-analog-bank = <0x0>;
           xlnx,is-ssit-slave2 = <0x0>;
           xlnx,is-ssit-slave2-analog-bank = <0x0>;
           xlnx,sampling-rate = "192307.6923076923";
           xlnx,sequence-r0 = <0x47e1>;
           xlnx,sequence-r1 = <0x0>;
           xlnx,sequence-r2 = <0x47e0>;
           xlnx,sequence-r3 = <0x0>;
           xlnx,sequence-r4 = <0x0>;
           xlnx,sequence-r5 = <0x0>;
           xlnx,sequence-r6 = <0x0>;
           xlnx,sequence-r7 = <0x0>;
           xlnx,sequence-r8 = <0x0>;
           xlnx,sequence-slave0-ssit-r0 = <0x100>;
           xlnx,sequence-slave0-ssit-r8 = <0x0>;
           xlnx,sequence-slave1-ssit-r0 = <0x100>;
           xlnx,sequence-slave1-ssit-r8 = <0x0>;
           xlnx,sequence-slave2-ssit-r0 = <0x100>;
           xlnx,sequence-slave2-ssit-r8 = <0x0>;
           xlnx,sim-device = "ZYNQ_ULTRASCALE";
           xlnx,sim-file-name = "design";
           xlnx,sim-file-rel-path = "./";
           xlnx,sim-file-sel = "Default";
           xlnx,user-supply0-bank = <0x2c>;
           xlnx,user-supply0-slave0-ssit-bank = <0x2c>;
           xlnx,user-supply0-slave0-ssit-source = "VCCO";
           xlnx,user-supply0-slave1-ssit-bank = <0x2c>;
           xlnx,user-supply0-slave1-ssit-source = "VCCO";
           xlnx,user-supply0-slave2-ssit-bank = <0x2c>;
           xlnx,user-supply0-slave2-ssit-source = "VCCO";
           xlnx,user-supply0-source = "VCCO";
           xlnx,user-supply1-bank = <0x2c>;
           xlnx,user-supply1-slave0-ssit-bank = <0x2c>;
           xlnx,user-supply1-slave0-ssit-source = "VCCINT";
           xlnx,user-supply1-slave1-ssit-bank = <0x2c>;
           xlnx,user-supply1-slave1-ssit-source = "VCCINT";
           xlnx,user-supply1-slave2-ssit-bank = <0x2c>;
           xlnx,user-supply1-slave2-ssit-source = "VCCINT";
           xlnx,user-supply1-source = "VCCINT";
           xlnx,user-supply2-bank = <0x2c>;
           xlnx,user-supply2-slave0-ssit-bank = <0x2c>;
           xlnx,user-supply2-slave0-ssit-source = "VCCAUX";
           xlnx,user-supply2-slave1-ssit-bank = <0x2c>;
           xlnx,user-supply2-slave1-ssit-source = "VCCAUX";
           xlnx,user-supply2-slave2-ssit-bank = <0x2c>;
           xlnx,user-supply2-slave2-ssit-source = "VCCAUX";
           xlnx,user-supply2-source = "VCCAUX";
           xlnx,user-supply3-bank = <0x41>;
           xlnx,user-supply3-slave0-ssit-bank = <0x41>;
           xlnx,user-supply3-slave0-ssit-source = "VCCO";
           xlnx,user-supply3-slave1-ssit-bank = <0x41>;
           xlnx,user-supply3-slave1-ssit-source = "VCCO";
           xlnx,user-supply3-slave2-ssit-bank = <0x41>;
           xlnx,user-supply3-slave2-ssit-source = "VCCO";
           xlnx,user-supply3-source = "VCCO";
           xlnx,vaux0 = <0x0>;
           xlnx,vaux1 = <0x0>;
           xlnx,vaux10 = <0x0>;
           xlnx,vaux11 = <0x0>;
           xlnx,vaux12 = <0x0>;
           xlnx,vaux13 = <0x0>;
           xlnx,vaux14 = <0x0>;
           xlnx,vaux15 = <0x0>;
           xlnx,vaux2 = <0x0>;
           xlnx,vaux3 = <0x0>;
           xlnx,vaux4 = <0x0>;
           xlnx,vaux5 = <0x0>;
           xlnx,vaux6 = <0x0>;
           xlnx,vaux7 = <0x0>;
           xlnx,vaux8 = <0x0>;
           xlnx,vaux9 = <0x0>;
           xlnx,vauxn0-loc = "AH1";
           xlnx,vauxn1-loc = "AH2";
           xlnx,vauxn10-loc = "AK5";
           xlnx,vauxn11-loc = "AK6";
           xlnx,vauxn12-loc = "AJ9";
           xlnx,vauxn13-loc = "AF7";
           xlnx,vauxn14-loc = "AK11";
           xlnx,vauxn15-loc = "AJ12";
           xlnx,vauxn2-loc = "AJ4";
           xlnx,vauxn3-loc = "AF5";
           xlnx,vauxn4-loc = "AK8";
           xlnx,vauxn5-loc = "AG10";
           xlnx,vauxn6-loc = "AK10";
           xlnx,vauxn7-loc = "AK12";
           xlnx,vauxn8-loc = "AK2";
           xlnx,vauxn9-loc = "AK3";
           xlnx,vauxp0-loc = "AG1";
           xlnx,vauxp1-loc = "AH3";
           xlnx,vauxp10-loc = "AJ5";
           xlnx,vauxp11-loc = "AK7";
           xlnx,vauxp12-loc = "AH9";
           xlnx,vauxp13-loc = "AF8";
           xlnx,vauxp14-loc = "AJ11";
           xlnx,vauxp15-loc = "AH12";
           xlnx,vauxp2-loc = "AH4";
           xlnx,vauxp3-loc = "AF6";
           xlnx,vauxp4-loc = "AK9";
           xlnx,vauxp5-loc = "AF10";
           xlnx,vauxp6-loc = "AJ10";
           xlnx,vauxp7-loc = "AK13";
           xlnx,vauxp8-loc = "AJ2";
           xlnx,vauxp9-loc = "AK4";
           xlnx,vpvn = <0x0>;
           status = "disabled";
       };

       axi_hsuart@80002000 {
           compatible = "xlnx,axi-hsuart-1.0";
           reg = <0x0 0x80002000 0x0 0x1000>;
           xlnx,s00-axi-addr-width = <0x4>;
           xlnx,s00-axi-data-width = <0x20>;
           status = "disabled";
       };

       axi_hsuart@80003000 {
           compatible = "xlnx,axi-hsuart-1.0";
           reg = <0x0 0x80003000 0x0 0x1000>;
           xlnx,s00-axi-addr-width = <0x4>;
           xlnx,s00-axi-data-width = <0x20>;
           status = "disabled";
       };

       axi_hsuart@80004000 {
           compatible = "xlnx,axi-hsuart-1.0";
           reg = <0x0 0x80004000 0x0 0x1000>;
           xlnx,s00-axi-addr-width = <0x4>;
           xlnx,s00-axi-data-width = <0x20>;
           status = "disabled";
       };

       axi_hsuart@80005000 {
           compatible = "xlnx,axi-hsuart-1.0";
           reg = <0x0 0x80005000 0x0 0x1000>;
           xlnx,s00-axi-addr-width = <0x4>;
           xlnx,s00-axi-data-width = <0x20>;
           status = "disabled";
       };

       axi_register@80006000 {
           compatible = "xlnx,axi-register-1.0";
           reg = <0x0 0x80006000 0x0 0x1000>;
           xlnx,s00-axi-addr-width = <0x7>;
           xlnx,s00-axi-data-width = <0x20>;
           status = "disabled";
       };

       axi_to_fabric_fifo@80000000 {
           compatible = "xlnx,axi-to-fabric-fifo-1.0";
           reg = <0x0 0x80000000 0x0 0x1000>;
           xlnx,s00-axi-addr-width = <0x6>;
           xlnx,s00-axi-aruser-width = <0x10>;
           xlnx,s00-axi-awuser-width = <0x10>;
           xlnx,s00-axi-buser-width = <0x0>;
           xlnx,s00-axi-data-width = <0x20>;
           xlnx,s00-axi-id-width = <0x0>;
           xlnx,s00-axi-ruser-width = <0x0>;
           xlnx,s00-axi-wuser-width = <0x0>;
           status = "disabled";
       };

       fabric_to_axi_fifo@80001000 {
           compatible = "xlnx,fabric-to-axi-fifo-1.0";
           reg = <0x0 0x80001000 0x0 0x1000>;
           xlnx,s00-axi-addr-width = <0xc>;
           xlnx,s00-axi-aruser-width = <0x10>;
           xlnx,s00-axi-awuser-width = <0x10>;
           xlnx,s00-axi-buser-width = <0x0>;
           xlnx,s00-axi-data-width = <0x20>;
           xlnx,s00-axi-id-width = <0x0>;
           xlnx,s00-axi-ruser-width = <0x0>;
           xlnx,s00-axi-wuser-width = <0x0>;
           status = "disabled";
       };

       spi_master@80007000 {
           compatible = "xlnx,spi-master-1.0";
           reg = <0x0 0x80007000 0x0 0x1000>;
           status = "disabled";
       };

       PERIPHERAL@ff380000 {
           compatible = "xlnx,PERIPHERAL-1.0";
           reg = <0x0 0xff380000 0x0 0x80000>;
       };

       PERIPHERAL@ff990000 {
           compatible = "xlnx,PERIPHERAL-1.0";
           reg = <0x0 0xff990000 0x0 0x10000>;
       };

       dma@a000f000 {
           compatible = "adi,axi-dmac-1.00.a";
           reg = <0x0 0xa000f000 0x0 0x1000>;
           #dma-cells = <0x1>;
           #clock-cells = <0x0>;
           interrupts = <0x0 0x6d 0x0>;
           clocks = <0x3 0x48>;
           linux,phandle = <0x4e>;
           phandle = <0x4e>;

           adi,channels {
               #size-cells = <0x0>;
               #address-cells = <0x1>;

               dma-channel@0 {
                   reg = <0x0>;
                   adi,source-bus-width = <0x40>;
                   adi,source-bus-type = <0x2>;
                   adi,destination-bus-width = <0x40>;
                   adi,destination-bus-type = <0x0>;
               };
           };
       };

       dma@a0010000 {
           compatible = "adi,axi-dmac-1.00.a";
           reg = <0x0 0xa0010000 0x0 0x1000>;
           #dma-cells = <0x1>;
           #clock-cells = <0x0>;
           interrupts = <0x0 0x6b 0x0>;
           clocks = <0x3 0x48>;
           linux,phandle = <0x50>;
           phandle = <0x50>;

           adi,channels {
               #size-cells = <0x0>;
               #address-cells = <0x1>;

               dma-channel@0 {
                   reg = <0x0>;
                   adi,source-bus-width = <0x80>;
                   adi,source-bus-type = <0x2>;
                   adi,destination-bus-width = <0x40>;
                   adi,destination-bus-type = <0x0>;
               };
           };
       };

       dma@a0011000 {
           compatible = "adi,axi-dmac-1.00.a";
           reg = <0x0 0xa0011000 0x0 0x1000>;
           #dma-cells = <0x1>;
           #clock-cells = <0x0>;
           interrupts = <0x0 0x6c 0x0>;
           clocks = <0x3 0x48>;
           linux,phandle = <0x51>;
           phandle = <0x51>;

           adi,channels {
               #size-cells = <0x0>;
               #address-cells = <0x1>;

               dma-channel@0 {
                   reg = <0x0>;
                   adi,source-bus-width = <0x80>;
                   adi,source-bus-type = <0x0>;
                   adi,destination-bus-width = <0x80>;
                   adi,destination-bus-type = <0x2>;
               };
           };
       };

       axi-adrv9009-rx-hpc@a00c0000 {
           compatible = "adi,axi-adrv9009-rx-1.0";
           reg = <0x0 0xa00c0000 0x0 0x8000>;
           dmas = <0x4e 0x0>;
           dma-names = "rx";
           spibus-connected = <0x4f>;
       };

       axi-adrv9009-rx-obs-hpc@a00c8000 {
           compatible = "adi,axi-adrv9009-obs-1.0";
           reg = <0x0 0xa00c8000 0x0 0x1000>;
           dmas = <0x50 0x0>;
           dma-names = "rx";
           clocks = <0x4f 0x1>;
           clock-names = "sampl_clk";
       };

       axi-adrv9009-tx-hpc@a00c4000 {
           compatible = "adi,axi-adrv9009-tx-1.0";
           reg = <0x0 0xa00c4000 0x0 0x4000>;
           dmas = <0x51 0x0>;
           dma-names = "tx";
           clocks = <0x4f 0x2>;
           clock-names = "sampl_clk";
           spibus-connected = <0x4f>;
           plddrbypass-gpios = <0x20 0x8a 0x0>;
       };
   };

   chosen {
       bootargs = "earlycon clk_ignore_unused cpuidle.off=1 uio_pdrv_genirq.of_id=\"generic-uio\"";
       stdout-path = "serial0:115200n8";
   };

   aliases {
       ethernet0 = "/amba/ethernet@ff0b0000";
       i2c0 = "/amba/i2c@ff020000";
       i2c1 = "/amba/i2c@ff030000";
       serial0 = "/amba/serial@ff000000";
       serial1 = "/amba_pl@0/serial@b0007000";
       serial2 = "/amba_pl@0/serial@b0008000";
       serial3 = "/amba_pl@0/serial@b0009000";
       serial4 = "/amba/serial@ff010000";
       spi0 = "/amba/spi@ff0f0000";
       spi1 = "/amba/spi@ff040000";
       spi2 = "/amba/spi@ff050000";
   };

   memory {
       device_type = "memory";
       reg = <0x0 0x0 0x0 0x80000000>;
   };

   reserved-memory {
       #address-cells = <0x2>;
       #size-cells = <0x2>;
       ranges;

       rproc@7fc00000 {
           no-map;
           reg = <0x0 0x7fc00000 0x0 0x400000>;
       };
   };
};
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0 gavint
on Jul 15, 2020 10:56 AM
I was hoping someone would know the source of the "axi-adrv9009-tx-hpc" and "axi-adrv9009-rx-hpc" messages so that I can verify:

1) That the required driver is enabled in the kernel configuration

or

2) Confirm that there must be something else wrong with my implementation.
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0 gavint
on Jul 15, 2020 10:57 AM
Here is a copy of my device tree modifications for the ADRV9009:

/include/ "system-conf.dtsi"
/ {

// adrv9009_dac_fifo_bypass_s 60
// ad9528_reset_b,       // 59
// ad9528_sysref_req,    // 58
// adrv9009_tx1_enable,    // 57
// adrv9009_tx2_enable,    // 56
// adrv9009_rx1_enable,    // 55
// adrv9009_rx2_enable,    // 54
// adrv9009_test,          // 53
// adrv9009_reset_b,       // 52
// adrv9009_gpint,         // 51
// adrv9009_gpio_00,       // 50
// adrv9009_gpio_01,       // 49
// adrv9009_gpio_02,       // 48
// adrv9009_gpio_03,       // 47
// adrv9009_gpio_04,       // 46
// adrv9009_gpio_05,       // 45
// adrv9009_gpio_06,       // 44
// adrv9009_gpio_07,       // 43
// adrv9009_gpio_15,       // 42
// adrv9009_gpio_08,       // 41
// adrv9009_gpio_09,       // 40
// adrv9009_gpio_10,       // 39
// adrv9009_gpio_11,       // 38
// adrv9009_gpio_12,       // 37
// adrv9009_gpio_14,       // 36
// adrv9009_gpio_13,       // 35
// adrv9009_gpio_17,       // 34
// adrv9009_gpio_16,       // 33
// adrv9009_gpio_18}));    // 32 + 78

   amba {
       r5_0_tcm_a: tcm@ffe00000 {
           compatible = "mmio-sram";
           reg = <0 0xFFE00000 0x0 0x10000>;
           pd-handle = <&pd_tcm_0_a>;
       };
       r5_0_tcm_b: tcm@ffe20000 {
           compatible = "mmio-sram";
           reg = <0 0xFFE20000 0x0 0x10000>;
           pd-handle = <&pd_tcm_0_b>;
       };
       r5_1_tcm_a: tcm@ffe90000 {
           compatible = "mmio-sram";
           reg = <0 0xFFE90000 0x0 0x10000>;
           pd-handle = <&pd_tcm_1_a>;
       };
       r5_1_tcm_b: tcm@ffe92000 {
           compatible = "mmio-sram";
           reg = <0 0xFFEB0000 0x0 0x10000>;
           pd-handle = <&pd_tcm_1_b>;
       };

       elf_ddr_0: ddr@7fc00000 {
           compatible = "mmio-sram";
           reg = <0 0x7fc00000 0x0 0x100000>;
       };

       elf_ddr_1: ddr@7fe00000 {
           compatible = "mmio-sram";
           reg = <0 0x7fe00000 0x0 0x100000>;
       };

       ocm_0: ocm@fffc0000 {
           compatible = "mmio-sram";
           reg = <0 0xfffc0000 0x0 0x40000>;
           pd-handle = <&pd_ocm_0>;
       };

       test_r50: zynqmp_r5_rproc@0 {
           compatible = "xlnx,zynqmp-r5-remoteproc-1.0";
           reg = <0x0 0xff9a0100 0 0x100>, <0x0 0xff340000 0 0x100>, <0x0 0xff9a0000 0 0x100>;
           reg-names = "rpu_base", "ipi", "rpu_glbl_base";
           dma-ranges;
           core_conf = "split0";
           srams = <&r5_0_tcm_a &r5_0_tcm_b &elf_ddr_0 &ocm_0>;
           pd-handle = <&pd_r5_0>;
           interrupt-parent = <&gic>;
           interrupts = <0 29 4>;

       } ;

       test_r51: zynqmp_r5_rproc@1 {
           compatible = "xlnx,zynqmp-r5-remoteproc-1.0";
           reg =<0x0 0xff9a0200 0 0x100>, <0x0 0xff340000 0 0x100>, <0x0 0xff9a0000 0 0x100>;
           reg-names = "rpu_base", "ipi", "rpu_glbl_base";
           dma-ranges;
           core_conf = "split1";
           srams = <&r5_1_tcm_a &r5_1_tcm_b &elf_ddr_1>;
           pd-handle = <&pd_r5_1>;
           interrupt-parent = <&gic>;
           interrupts = <0 29 4>;

       } ;

       ethernet@ff0b0000 {
           compatible = "cdns,zynqmp-gem";
           status = "okay";
           phy-mode = "rgmii-id";
           phy-handle = <&phy0>;
                        phy0:phy@3 {
                                reg = <3>;
               rxc-skew-ps = <900>;
               txc-skew-ps = <1800>;
               txen-skew-ps = <420>;
               rxdv-skew-ps = <420>;
               rxd0-skew-ps = <420>;
               rxd1-skew-ps = <420>;
               rxd2-skew-ps = <420>;
               rxd3-skew-ps = <420>;
               txd0-skew-ps = <420>;
               txd1-skew-ps = <420>;
               txd2-skew-ps = <420>;
               txd3-skew-ps = <420>;
                        };
       };

       sdhci@ff160000 {
           status = "okay";
           non-removable;
           disable-wp;
       };

       sdhci@ff170000 {
           status = "okay";
           no-1-8-v;
           wp-inverted;
       };

       i2c@ff030000 {
           status = "disabled";
       };

       serial@ff010000 {
           status = "disabled";
       };

       spi@ff0f0000 {
           status = "disabled";
       };

       gpio@ff0a0000 {
           status = "okay";
       };

       spi@ff040000 {
           compatible = "cdns,spi-r1p6";
           status = "okay";
           is-decoded-cs = <0x0>;
           num-cs = <0x3>;

           clk0_ad9528: ad9528-1@1 {
               compatible = "adi,ad9528";
               reg = <1>;

               #address-cells = <1>;
               #size-cells = <0>;

               spi-max-frequency = <10000000>;
               //adi,spi-3wire-enable;

               clock-output-names = "ad9528-1_out0", "ad9528-1_out1", "ad9528-1_out2",
                   "ad9528-1_out3", "ad9528-1_out4", "ad9528-1_out5", "ad9528-1_out6",
                   "ad9528-1_out7", "ad9528-1_out8", "ad9528-1_out9", "ad9528-1_out10",
                   "ad9528-1_out11", "ad9528-1_out12", "ad9528-1_out13";
               #clock-cells = <1>;

               adi,vcxo-freq = <122880000>;

               adi,refa-enable;
               adi,refa-diff-rcv-enable;
               adi,refa-r-div = <1>;
               adi,osc-in-cmos-neg-inp-enable;

               /* PLL1 config */
               adi,pll1-feedback-div = <4>;
               adi,pll1-charge-pump-current-nA = <5000>;

               /* PLL2 config */
               adi,pll2-vco-div-m1 = <3>; /* use 5 for 184320000 output device clock */
               adi,pll2-n2-div = <10>; /* N / M1 */
               adi,pll2-r1-div = <1>;
               adi,pll2-charge-pump-current-nA = <805000>;

               /* SYSREF config */
               adi,sysref-src = <2>; // SYSREF_SRC_INTERNAL
               adi,sysref-pattern-mode = <1>; // SYSREF_PATTERN_CONTINUOUS
               adi,sysref-k-div = <512>;
               adi,sysref-request-enable;
               adi,sysref-nshot-mode = <3>; // SYSREF_NSHOT_4_PULSES
               adi,sysref-request-trigger-mode = <0>; // SYSREF_LEVEL_HIGH

               adi,rpole2 = <0>; // RPOLE2_900_OHM
               adi,rzero = <7>; // RZERO_1850_OHM
               adi,cpole1 = <2>; // CPOLE1_16_PF

               adi,status-mon-pin0-function-select = <1>; /* PLL1 & PLL2 Locked */
               adi,status-mon-pin1-function-select = <7>; /* REFA Correct */

               /* GT */
               reset-gpios = <&gpio 137 0>;

               ad9528_0_c13: channel@13 {
                   reg = <13>;
                   adi,extended-name = "DEV_CLK";
                   adi,driver-mode = <0>; // DRIVER_MODE_LVDS
                   adi,divider-phase = <0>;
                   adi,channel-divider = <5>;
                   adi,signal-source = <0>; // SOURCE_VCO
               };

               ad9528_0_c1: channel@1 {
                   reg = <1>;
                   adi,extended-name = "FMC_CLK";
                   adi,driver-mode = <0>; // DRIVER_MODE_LVDS
                   adi,divider-phase = <0>;
                   adi,channel-divider = <5>;
                   adi,signal-source = <0>; // SOURCE_VCO
               };

               ad9528_0_c12: channel@12 {
                   reg = <12>;
                   adi,extended-name = "DEV_SYSREF";
                   adi,driver-mode = <0>; // DRIVER_MODE_LVDS
                   adi,divider-phase = <0>;
                   adi,channel-divider = <5>;
                   adi,signal-source = <2>; // SOURCE_SYSREF_VCO
               };

               ad9528_0_c3: channel@3 {
                   reg = <3>;
                   adi,extended-name = "FMC_SYSREF";
                   adi,driver-mode = <0>; // DRIVER_MODE_LVDS
                   adi,divider-phase = <0>;
                   adi,channel-divider = <5>;
                   adi,signal-source = <2>; // SOURCE_SYSREF_VCO
               };
           };

           trx0_adrv9009: adrv9009-phy@0 {
               compatible = "adrv9009";
               reg = <0>;

               #address-cells = <1>;
               #size-cells = <0>;

               /* SPI Setup */
               spi-max-frequency = <25000000>;

               interrupt-parent = <&gpio>;
               interrupts = <129 1>; // IRQ_TYPE_EDGE_RISING

               /* GT */
               reset-gpios = <&gpio 130 0>;
               test-gpios = <&gpio 131 0>;
               sysref-req-gpios = <&gpio 136 0>;
               rx2-enable-gpios = <&gpio 132 0>;
               rx1-enable-gpios = <&gpio 133 0>;
               tx2-enable-gpios = <&gpio 134 0>;
               tx1-enable-gpios = <&gpio 135 0>;

               /* Clocks */
               clocks = <&axi_adrv9009_rx_jesd>, <&axi_adrv9009_tx_jesd>,
                   <&axi_adrv9009_rx_os_jesd>, <&clk0_ad9528 13>,
                   <&clk0_ad9528 1>, <&clk0_ad9528 12>, <&clk0_ad9528 3>;
               clock-names = "jesd_rx_clk", "jesd_tx_clk", "jesd_rx_os_clk",
                   "dev_clk", "fmc_clk", "sysref_dev_clk",
                   "sysref_fmc_clk";

               /* MB clocks = <&axi_adrv9009_rx_jesd>, <&axi_adrv9009_tx_jesd>,
                   <&axi_adrv9009_rx_os_jesd>, <&hmc7044 6>, <&hmc7044 0>, <&hmc7044 7>, <&hmc7044 1>;
               clock-names = "jesd_rx_clk", "jesd_tx_clk", "jesd_rx_os_clk", "adrv9009_0_sysclk", "jesd204b0_gbtclk", "adrv9009_0_sysref", "som_sysref"; */

               clock-output-names = "rx_sampl_clk", "rx_os_sampl_clk", "tx_sampl_clk";
               #clock-cells = <1>;

               /* JESD204 */

               /* JESD204 RX */
               adi,jesd204-framer-a-bank-id = <1>;
               adi,jesd204-framer-a-device-id = <0>;
               adi,jesd204-framer-a-lane0-id = <0>;
               adi,jesd204-framer-a-m = <4>;
               adi,jesd204-framer-a-k = <32>;
               adi,jesd204-framer-a-f = <4>;
               adi,jesd204-framer-a-np = <16>;
               adi,jesd204-framer-a-scramble = <1>;
               adi,jesd204-framer-a-external-sysref = <1>;
               adi,jesd204-framer-a-serializer-lanes-enabled = <0x03>;
               adi,jesd204-framer-a-serializer-lane-crossbar = <0xE4>;
               adi,jesd204-framer-a-lmfc-offset = <31>;
               adi,jesd204-framer-a-new-sysref-on-relink = <0>;
               adi,jesd204-framer-a-syncb-in-select = <0>;
               adi,jesd204-framer-a-over-sample = <0>;
               adi,jesd204-framer-a-syncb-in-lvds-mode = <1>;
               adi,jesd204-framer-a-syncb-in-lvds-pn-invert = <0>;
               adi,jesd204-framer-a-enable-manual-lane-xbar = <0>;

               /* JESD204 OBS */
               adi,jesd204-framer-b-bank-id = <0>;
               adi,jesd204-framer-b-device-id = <0>;
               adi,jesd204-framer-b-lane0-id = <0>;
               adi,jesd204-framer-b-m = <4>;
               adi,jesd204-framer-b-k = <32>;
               adi,jesd204-framer-b-f = <4>;
               adi,jesd204-framer-b-np = <16>;
               adi,jesd204-framer-b-scramble = <1>;
               adi,jesd204-framer-b-external-sysref = <1>;
               adi,jesd204-framer-b-serializer-lanes-enabled = <0x0C>;
               adi,jesd204-framer-b-serializer-lane-crossbar = <0xE4>;
               adi,jesd204-framer-b-lmfc-offset = <31>;
               adi,jesd204-framer-b-new-sysref-on-relink = <0>;
               adi,jesd204-framer-b-syncb-in-select = <1>;
               adi,jesd204-framer-b-over-sample = <0>;
               adi,jesd204-framer-b-syncb-in-lvds-mode = <1>;
               adi,jesd204-framer-b-syncb-in-lvds-pn-invert = <0>;
               adi,jesd204-framer-b-enable-manual-lane-xbar = <0>;

               /* JESD204 TX */
               adi,jesd204-deframer-a-bank-id = <0>;
               adi,jesd204-deframer-a-device-id = <0>;
               adi,jesd204-deframer-a-lane0-id = <0>;
               adi,jesd204-deframer-a-m = <4>;
               adi,jesd204-deframer-a-k = <32>;
               adi,jesd204-deframer-a-scramble = <1>;
               adi,jesd204-deframer-a-external-sysref = <1>;
               adi,jesd204-deframer-a-deserializer-lanes-enabled = <0x0F>;
               adi,jesd204-deframer-a-deserializer-lane-crossbar = <0xE4>;
               adi,jesd204-deframer-a-lmfc-offset = <17>;
               adi,jesd204-deframer-a-new-sysref-on-relink = <0>;
               adi,jesd204-deframer-a-syncb-out-select = <0>;
               adi,jesd204-deframer-a-np = <16>;
               adi,jesd204-deframer-a-syncb-out-lvds-mode = <1>;
               adi,jesd204-deframer-a-syncb-out-lvds-pn-invert = <0>;
               adi,jesd204-deframer-a-syncb-out-cmos-slew-rate = <0>;
               adi,jesd204-deframer-a-syncb-out-cmos-drive-level = <0>;
               adi,jesd204-deframer-a-enable-manual-lane-xbar = <0>;

               adi,jesd204-ser-amplitude = <15>;
               adi,jesd204-ser-pre-emphasis = <1>;
               adi,jesd204-ser-invert-lane-polarity = <0>;
               adi,jesd204-des-invert-lane-polarity = <0>;
               adi,jesd204-des-eq-setting = <1>;
               adi,jesd204-sysref-lvds-mode = <1>;
               adi,jesd204-sysref-lvds-pn-invert = <0>;

               /* RX */

               adi,rx-profile-rx-fir-gain_db = <(-6)>;
               adi,rx-profile-rx-fir-num-fir-coefs = <48>;
               adi,rx-profile-rx-fir-coefs = /bits/ 16 <(-2) (23) (46) (-17) (-104) (10) (208) (23) (-370) (-97) (607) (240) (-942) (-489) (1407) (910) (-2065) (-1637) (3058) (2995) (-4912) (-6526) (9941) (30489) (30489) (9941) (-6526) (-4912) (2995) (3058) (-1637) (-2065) (910) (1407) (-489) (-942) (240) (607) (-97) (-370) (23) (208) (10) (-104) (-17) (46) (23) (-2)>;

               adi,rx-profile-rx-fir-decimation = <2>;
               adi,rx-profile-rx-dec5-decimation = <4>;
               adi,rx-profile-rhb1-decimation = <1>;
               adi,rx-profile-rx-output-rate_khz = <245760>;
               adi,rx-profile-rf-bandwidth_hz = <200000000>;
               adi,rx-profile-rx-bbf3d-bcorner_khz = <200000>;
               adi,rx-profile-rx-adc-profile = /bits/ 16 <182 142 173 90 1280 982 1335 96 1369 48 1012 18 48 48 37 208 0 0 0 0 52 0 7 6 42 0 7 6 42 0 25 27 0 0 25 27 0 0 165 44 31 905>;
               adi,rx-profile-rx-ddc-mode = <0>;

               adi,rx-nco-shifter-band-a-input-band-width_khz = <0>;
               adi,rx-nco-shifter-band-a-input-center-freq_khz = <0>;
               adi,rx-nco-shifter-band-a-nco1-freq_khz = <0>;
               adi,rx-nco-shifter-band-a-nco2-freq_khz = <0>;
               adi,rx-nco-shifter-band-binput-band-width_khz = <0>;
               adi,rx-nco-shifter-band-binput-center-freq_khz = <0>;
               adi,rx-nco-shifter-band-bnco1-freq_khz = <0>;
               adi,rx-nco-shifter-band-bnco2-freq_khz = <0>;

               adi,rx-gain-control-gain-mode = <0>;
               adi,rx-gain-control-rx1-gain-index = <255>;
               adi,rx-gain-control-rx2-gain-index = <255>;
               adi,rx-gain-control-rx1-max-gain-index = <255>;
               adi,rx-gain-control-rx1-min-gain-index = <195>;
               adi,rx-gain-control-rx2-max-gain-index = <255>;
               adi,rx-gain-control-rx2-min-gain-index = <195>;

               adi,rx-settings-framer-sel = <0>;
               adi,rx-settings-rx-channels = <3>;

               /* ORX */

               adi,orx-profile-rx-fir-gain_db = <6>;
               adi,orx-profile-rx-fir-num-fir-coefs = <24>;
               adi,orx-profile-rx-fir-coefs = /bits/ 16 <(-10) (7) (-10) (-12) (6) (-12) (16) (-16) (1) (63) (-431) (17235) (-431) (63) (1) (-16) (16) (-12) (6) (-12) (-10) (7) (-10) (0)>;
               adi,orx-profile-rx-fir-decimation = <1>;
               adi,orx-profile-rx-dec5-decimation = <4>;
               adi,orx-profile-rhb1-decimation = <2>;
               adi,orx-profile-orx-output-rate_khz = <245760>;
               adi,orx-profile-rf-bandwidth_hz = <200000000>;
               adi,orx-profile-rx-bbf3d-bcorner_khz = <225000>;
               adi,orx-profile-orx-low-pass-adc-profile = /bits/ 16 <185 141 172 90 1280 942 1332 90 1368 46 1016 19 48 48 37 208 0 0 0 0 52 0 7 6 42 0 7 6 42 0 25 27 0 0 25 27 0 0 165 44 31 905>;
               adi,orx-profile-orx-band-pass-adc-profile = /bits/ 16 <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>;
               adi,orx-profile-orx-ddc-mode = <0>;
               adi,orx-profile-orx-merge-filter = /bits/ 16 <0 0 0 0 0 0 0 0 0 0 0 0>;

               adi,orx-gain-control-gain-mode = <0>;
               adi,orx-gain-control-orx1-gain-index = <255>;
               adi,orx-gain-control-orx2-gain-index = <255>;
               adi,orx-gain-control-orx1-max-gain-index = <255>;
               adi,orx-gain-control-orx1-min-gain-index = <195>;
               adi,orx-gain-control-orx2-max-gain-index = <255>;
               adi,orx-gain-control-orx2-min-gain-index = <195>;

               adi,obs-settings-framer-sel = <1>;
               adi,obs-settings-obs-rx-channels-enable = <3>;
               adi,obs-settings-obs-rx-lo-source = <0>;

               /* TX */

               adi,tx-profile-tx-fir-gain_db = <6>;
               adi,tx-profile-tx-fir-num-fir-coefs = <40>;
               adi,tx-profile-tx-fir-coefs = /bits/ 16 <(-14) (5) (-9) (6) (-4) (19) (-29) (27) (-30) (46) (-63) (77) (-103) (150) (-218) (337) (-599) (1266) (-2718) (19537) (-2718) (1266) (-599) (337) (-218) (150) (-103) (77) (-63) (46) (-30) (27) (-29) (19) (-4) (6) (-9) (5) (-14) (0)>;

               adi,tx-profile-dac-div = <1>;

               adi,tx-profile-tx-fir-interpolation = <1>;
               adi,tx-profile-thb1-interpolation = <2>;
               adi,tx-profile-thb2-interpolation = <2>;
               adi,tx-profile-thb3-interpolation = <2>;
               adi,tx-profile-tx-int5-interpolation = <1>;
               adi,tx-profile-tx-input-rate_khz = <245760>;
               adi,tx-profile-primary-sig-bandwidth_hz = <100000000>;
               adi,tx-profile-rf-bandwidth_hz = <225000000>;
               adi,tx-profile-tx-dac3d-bcorner_khz = <225000>;
               adi,tx-profile-tx-bbf3d-bcorner_khz = <113000>;
               adi,tx-profile-loop-back-adc-profile = /bits/ 16 <206 132 168 90 1280 641 1307 53 1359 28 1039 30 48 48 37 210 0 0 0 0 53 0 7 6 42 0 7 6 42 0 25 27 0 0 25 27 0 0 165 44 31 905>;

               adi,tx-settings-deframer-sel = <0>;
               adi,tx-settings-tx-channels = <3>;
               adi,tx-settings-tx-atten-step-size = <0>;
               adi,tx-settings-tx1-atten_md-b = <10000>;
               adi,tx-settings-tx2-atten_md-b = <10000>;
               adi,tx-settings-dis-tx-data-if-pll-unlock = <0>;

               /* Clocks */

               adi,dig-clocks-device-clock_khz = <245760>;
               adi,dig-clocks-clk-pll-vco-freq_khz = <9830400>;
               adi,dig-clocks-clk-pll-hs-div = <1>;
               adi,dig-clocks-rf-pll-use-external-lo = <0>;
               adi,dig-clocks-rf-pll-phase-sync-mode = <0>;

               /* AGC */

               adi,rxagc-peak-agc-under-range-low-interval_ns = <205>;
               adi,rxagc-peak-agc-under-range-mid-interval = <2>;
               adi,rxagc-peak-agc-under-range-high-interval = <4>;
               adi,rxagc-peak-apd-high-thresh = <39>;
               adi,rxagc-peak-apd-low-gain-mode-high-thresh = <36>;
               adi,rxagc-peak-apd-low-thresh = <23>;
               adi,rxagc-peak-apd-low-gain-mode-low-thresh = <19>;
               adi,rxagc-peak-apd-upper-thresh-peak-exceeded-cnt = <6>;
               adi,rxagc-peak-apd-lower-thresh-peak-exceeded-cnt = <3>;
               adi,rxagc-peak-apd-gain-step-attack = <4>;
               adi,rxagc-peak-apd-gain-step-recovery = <2>;
               adi,rxagc-peak-enable-hb2-overload = <1>;
               adi,rxagc-peak-hb2-overload-duration-cnt = <1>;
               adi,rxagc-peak-hb2-overload-thresh-cnt = <4>;
               adi,rxagc-peak-hb2-high-thresh = <181>;
               adi,rxagc-peak-hb2-under-range-low-thresh = <45>;
               adi,rxagc-peak-hb2-under-range-mid-thresh = <90>;
               adi,rxagc-peak-hb2-under-range-high-thresh = <128>;
               adi,rxagc-peak-hb2-upper-thresh-peak-exceeded-cnt = <6>;
               adi,rxagc-peak-hb2-lower-thresh-peak-exceeded-cnt = <3>;
               adi,rxagc-peak-hb2-gain-step-high-recovery = <2>;
               adi,rxagc-peak-hb2-gain-step-low-recovery = <4>;
               adi,rxagc-peak-hb2-gain-step-mid-recovery = <8>;
               adi,rxagc-peak-hb2-gain-step-attack = <4>;
               adi,rxagc-peak-hb2-overload-power-mode = <1>;
               adi,rxagc-peak-hb2-ovrg-sel = <0>;
               adi,rxagc-peak-hb2-thresh-config = <3>;

               adi,rxagc-power-power-enable-measurement = <1>;
               adi,rxagc-power-power-use-rfir-out = <1>;
               adi,rxagc-power-power-use-bbdc2 = <0>;
               adi,rxagc-power-under-range-high-power-thresh = <9>;
               adi,rxagc-power-under-range-low-power-thresh = <2>;
               adi,rxagc-power-under-range-high-power-gain-step-recovery = <4>;
               adi,rxagc-power-under-range-low-power-gain-step-recovery = <4>;
               adi,rxagc-power-power-measurement-duration = <5>;
               adi,rxagc-power-rx1-tdd-power-meas-duration = <5>;
               adi,rxagc-power-rx1-tdd-power-meas-delay = <1>;
               adi,rxagc-power-rx2-tdd-power-meas-duration = <5>;
               adi,rxagc-power-rx2-tdd-power-meas-delay = <1>;
               adi,rxagc-power-upper0-power-thresh = <2>;
               adi,rxagc-power-upper1-power-thresh = <0>;
               adi,rxagc-power-power-log-shift = <0>;

               adi,rxagc-agc-peak-wait-time = <4>;
               adi,rxagc-agc-rx1-max-gain-index = <255>;
               adi,rxagc-agc-rx1-min-gain-index = <195>;
               adi,rxagc-agc-rx2-max-gain-index = <255>;
               adi,rxagc-agc-rx2-min-gain-index = <195>;
               adi,rxagc-agc-gain-update-counter_us = <250>;
               adi,rxagc-agc-rx1-attack-delay = <10>;
               adi,rxagc-agc-rx2-attack-delay = <10>;
               adi,rxagc-agc-slow-loop-settling-delay = <16>;
               adi,rxagc-agc-low-thresh-prevent-gain = <0>;
               adi,rxagc-agc-change-gain-if-thresh-high = <1>;
               adi,rxagc-agc-peak-thresh-gain-control-mode = <1>;
               adi,rxagc-agc-reset-on-rxon = <0>;
               adi,rxagc-agc-enable-sync-pulse-for-gain-counter = <0>;
               adi,rxagc-agc-enable-ip3-optimization-thresh = <0>;
               adi,rxagc-ip3-over-range-thresh = <31>;
               adi,rxagc-ip3-over-range-thresh-index = <246>;
               adi,rxagc-ip3-peak-exceeded-cnt = <4>;
               adi,rxagc-agc-enable-fast-recovery-loop = <0>;

               /* Misc */

               adi,aux-dac-enables = <0x00>; /* Mask */

               adi,aux-dac-vref0 = <3>;
               adi,aux-dac-resolution0 = <0>;
               adi,aux-dac-values0 = <0>;
               adi,aux-dac-vref1 = <3>;
               adi,aux-dac-resolution1 = <0>;
               adi,aux-dac-values1 = <0>;
               adi,aux-dac-vref2 = <3>;
               adi,aux-dac-resolution2 = <0>;
               adi,aux-dac-values2 = <0>;
               adi,aux-dac-vref3 = <3>;
               adi,aux-dac-resolution3 = <0>;
               adi,aux-dac-values3 = <0>;
               adi,aux-dac-vref4 = <3>;
               adi,aux-dac-resolution4 = <0>;
               adi,aux-dac-values4 = <0>;
               adi,aux-dac-vref5 = <3>;
               adi,aux-dac-resolution5 = <0>;
               adi,aux-dac-values5 = <0>;
               adi,aux-dac-vref6 = <3>;
               adi,aux-dac-resolution6 = <0>;
               adi,aux-dac-values6 = <0>;
               adi,aux-dac-vref7 = <3>;
               adi,aux-dac-resolution7 = <0>;
               adi,aux-dac-values7 = <0>;
               adi,aux-dac-vref8 = <3>;
               adi,aux-dac-resolution8 = <0>;
               adi,aux-dac-values8 = <0>;
               adi,aux-dac-vref9 = <3>;
               adi,aux-dac-resolution9 = <0>;
               adi,aux-dac-values9 = <0>;
               adi,aux-dac-vref10 = <3>;
               adi,aux-dac-resolution10 = <0>;
               adi,aux-dac-values10 = <0>;
               adi,aux-dac-vref11 = <3>;
               adi,aux-dac-resolution11 = <0>;
               adi,aux-dac-values11 = <0>;

               adi,arm-gpio-config-orx1-tx-sel0-pin-gpio-pin-sel = <0>;
               adi,arm-gpio-config-orx1-tx-sel0-pin-polarity = <0>;
               adi,arm-gpio-config-orx1-tx-sel0-pin-enable = <0>;

               adi,arm-gpio-config-orx1-tx-sel1-pin-gpio-pin-sel = <0>;
               adi,arm-gpio-config-orx1-tx-sel1-pin-polarity = <0>;
               adi,arm-gpio-config-orx1-tx-sel1-pin-enable = <0>;
               adi,arm-gpio-config-orx2-tx-sel0-pin-gpio-pin-sel = <0>;
               adi,arm-gpio-config-orx2-tx-sel0-pin-polarity = <0>;
               adi,arm-gpio-config-orx2-tx-sel0-pin-enable = <0>;

               adi,arm-gpio-config-orx2-tx-sel1-pin-gpio-pin-sel = <0>;
               adi,arm-gpio-config-orx2-tx-sel1-pin-polarity = <0>;
               adi,arm-gpio-config-orx2-tx-sel1-pin-enable = <0>;
               adi,arm-gpio-config-en-tx-tracking-cals-gpio-pin-sel = <0>;
               adi,arm-gpio-config-en-tx-tracking-cals-polarity = <0>;
               adi,arm-gpio-config-en-tx-tracking-cals-enable = <0>;

               adi,orx-lo-cfg-disable-aux-pll-relocking = <0>;
               adi,orx-lo-cfg-gpio-select = <19>;

               adi,fhm-config-fhm-gpio-pin = <0>;
               adi,fhm-config-fhm-min-freq_mhz = <2400>;
               adi,fhm-config-fhm-max-freq_mhz = <2500>;

               adi,fhm-mode-fhm-enable = <0>;
               adi,fhm-mode-enable-mcs-sync = <0>;
               adi,fhm-mode-fhm-trigger-mode = <0>;
               adi,fhm-mode-fhm-exit-mode = <1>;
               adi,fhm-mode-fhm-init-frequency_hz = <2450000000>;

               adi,rx1-gain-ctrl-pin-inc-step = <1>;
               adi,rx1-gain-ctrl-pin-dec-step = <1>;
               adi,rx1-gain-ctrl-pin-rx-gain-inc-pin = <0>;
               adi,rx1-gain-ctrl-pin-rx-gain-dec-pin = <1>;
               adi,rx1-gain-ctrl-pin-enable = <0>;

               adi,rx2-gain-ctrl-pin-inc-step = <1>;
               adi,rx2-gain-ctrl-pin-dec-step = <1>;
               adi,rx2-gain-ctrl-pin-rx-gain-inc-pin = <3>;
               adi,rx2-gain-ctrl-pin-rx-gain-dec-pin = <4>;
               adi,rx2-gain-ctrl-pin-enable = <0>;

               adi,tx1-atten-ctrl-pin-step-size = <0>;
               adi,tx1-atten-ctrl-pin-tx-atten-inc-pin = <4>;
               adi,tx1-atten-ctrl-pin-tx-atten-dec-pin = <5>;
               adi,tx1-atten-ctrl-pin-enable = <0>;

               adi,tx2-atten-ctrl-pin-step-size = <0>;
               adi,tx2-atten-ctrl-pin-tx-atten-inc-pin = <6>;
               adi,tx2-atten-ctrl-pin-tx-atten-dec-pin = <7>;
               adi,tx2-atten-ctrl-pin-enable = <0>;

               adi,tx-pa-protection-avg-duration = <3>;
               adi,tx-pa-protection-tx-atten-step = <2>;
               adi,tx-pa-protection-tx1-power-threshold = <4096>;
               adi,tx-pa-protection-tx2-power-threshold = <4096>;
               adi,tx-pa-protection-peak-count = <4>;
               adi,tx-pa-protection-tx1-peak-threshold = <140>;
               adi,tx-pa-protection-tx2-peak-threshold = <140>;
           };
       };

       /* MB spi@ff050000 {
           status = "okay";
           is-decoded-cs = <0x0>;
           num-cs = <0x1>;

           hmc7044: hmc7044@0 {
               #address-cells = <1>;
               #size-cells = <0>;
               #clock-cells = <1>;
               compatible = "adi,hmc7044";
               reg = <0>;
               spi-max-frequency = <10000000>;

               adi,pll1-clkin-frequencies = <0 0 0 122880000>;
               adi,pll1-ref-prio-ctrl = <0xFF>; // prefer CLKIN3

               adi,clkin0-buffer-mode = <0x07>;
               adi,clkin1-buffer-mode = <0x07>;
               adi,clkin2-buffer-mode = <0x10>;
               adi,clkin3-buffer-mode = <0x07>;
               adi,sync-pin-mode = <1>;

               adi,pll1-loop-bandwidth-hz = <30>;

               adi,vcxo-frequency = <122880000>;

               adi,pll2-output-frequency = <2949120000>;

               adi,sysref-timer-divider = <3840>;
               adi,pulse-generator-mode = <0>;

               adi,oscin-buffer-mode = <0x07>;

               adi,gpi-controls = <0x00 0x00 0x00 0x00>;
               adi,gpo-controls = <0x20 0x20 0x20 0x20>;

               adi,high-performance-mode-clock-dist-enable; // NOT USED
               adi,high-performance-mode-pll-vco-enable; // NOT USED

               clock-output-names =
                   "hmc7044_out0_JESD204B0_GBTCLK", "hmc7044_out1_SOM_SYSREF",
                   "hmc7044_out2_ADRV9009_2_SYSCLK", "hmc7044_out3_ADRV9009_2_SYSREF",
                   "hmc7044_out4_ADRV9009_1_SYSCLK", "hmc7044_out5_ADRV9009_1_SYSREF",
                   "hmc7044_out6_ADRV9009_0_SYSCLK", "hmc7044_out7_ADRV9009_0_SYSREF",
                   "hmc7044_out8_JESD204B1_GBTCLK","hmc7044_out9",
                   "hmc7044_out10_JESD204B2_GBTCLK2", "hmc7044_out11",
                   "hmc7044_out12_SCO", "hmc7044_out13_SRO";

               hmc7044_c0: channel@0 {
                   reg = <0>;
                   adi,extended-name = "JESD204B0_GBTCLK";
                   adi,divider = <12>;   // 245760000
                   adi,driver-mode = <2>;   // LVDS
               };
               hmc7044_c1: channel@1 {
                   reg = <1>;
                   adi,extended-name = "SOM_SYSREF";
                   adi,divider = <3840>;   // 768000
                   adi,driver-mode = <2>;   // LVDS
                   adi,high-performance-mode-disable;
               };
               hmc7044_c2: channel@2 {
                   reg = <2>;
                   adi,extended-name = "ADRV9009_2_SYSCLK";
                   adi,divider = <12>;   // 245760000
                   adi,driver-mode = <1>;   // LVPECL
               };
               hmc7044_c3: channel@3 {
                   reg = <3>;
                   adi,extended-name = "ADRV9009_2_SYSREF";
                   adi,divider = <3840>;   // 768000
                   adi,driver-mode = <2>;   // LVDS
                   adi,startup-mode-dynamic-enable;
                   adi,high-performance-mode-disable;
               };
               hmc7044_c4: channel@4 {
                   reg = <4>;
                   adi,extended-name = "ADRV9009_1_SYSCLK";
                   adi,divider = <12>;   // 245760000
                   adi,driver-mode = <1>;   // LVPECL
               };
               hmc7044_c5: channel@5 {
                   reg = <5>;
                   adi,extended-name = "ADRV9009_1_SYSREF";
                   adi,divider = <3840>;   // 768000
                   adi,driver-mode = <2>;   // LVDS
                   adi,startup-mode-dynamic-enable;
                   adi,high-performance-mode-disable;
               };
               hmc7044_c6: channel@6 {
                   reg = <6>;
                   adi,extended-name = "ADRV9009_0_SYSCLK";
                   adi,divider = <12>;   // 245760000
                   adi,driver-mode = <1>;   // LVPECL
               };
               hmc7044_c7: channel@7 {
                   reg = <7>;
                   adi,extended-name = "ADRV9009_0_SYSREF";
                   adi,divider = <3840>;   // 768000
                   adi,driver-mode = <2>;   // LVDS
                   adi,startup-mode-dynamic-enable;
                   adi,high-performance-mode-disable;
               };
               hmc7044_c8: channel@8 {
                   reg = <8>;
                   adi,extended-name = "JESD204B1_GBTCLK";
                   adi,divider = <12>;   // 245760000
                   adi,driver-mode = <2>;   // LVDS
               };

               hmc7044_c10: channel@10 {
                   reg = <10>;
                   adi,extended-name = "JESD204B2_GBTCLK2";
                   adi,divider = <12>;   // 245760000
                   adi,driver-mode = <2>;   // LVDS
               };
               hmc7044_c12: channel@12 {
                   reg = <12>;
                   adi,extended-name = "SCO";
                   adi,divider = <12>;   // 245760000
                   adi,driver-mode = <1>;   // LVPECL
               };
               hmc7044_c13: channel@13 {
                   reg = <13>;
                   adi,extended-name = "SRO";
                   adi,divider = <3840>;   // 768000
                   adi,driver-mode = <1>;   // LVPECL
                   adi,high-performance-mode-disable;
               };
           };
       }; */
   };

   amba_pl@0 {

       /delete-node/ axi_adrv9009@a00c0000;
       /delete-node/ axi_dmac@a000f000;
       /delete-node/ axi_dmac@a0010000;
       /delete-node/ axi_dmac@a0011000;

       rx_dma: dma@a000f000 {
           compatible = "adi,axi-dmac-1.00.a";
           /* GT reg = <0xa000f000 0x10000>;*/
           reg = <0x0 0xa000f000 0x0 0x1000>;
           #dma-cells = <1>;
           #clock-cells = <0>;
           interrupts = <0 109 0>;
           /* GT clocks = <&clk 73>;*/
           clocks = <&clk 72>;

           adi,channels {
               #size-cells = <0>;
               #address-cells = <1>;

               dma-channel@0 {
                   reg = <0>;
                   adi,source-bus-width = <64>;
                   adi,source-bus-type = <2>;
                   adi,destination-bus-width = <64>;
                   adi,destination-bus-type = <0>;
               };
           };
       };

       rx_obs_dma: dma@a0010000 {
           compatible = "adi,axi-dmac-1.00.a";
           /* GT reg = <0xa0010000 0x10000>;*/
           reg = <0x0 0xa0010000 0x0 0x1000>;
           #dma-cells = <1>;
           #clock-cells = <0>;
           interrupts = <0 107 0>;
           /* GT clocks = <&clk 73>;*/
           clocks = <&clk 72>;

           adi,channels {
               #size-cells = <0>;
               #address-cells = <1>;

               dma-channel@0 {
                   reg = <0>;
                   adi,source-bus-width = <128>;
                   adi,source-bus-type = <2>;
                   adi,destination-bus-width = <64>;
                   adi,destination-bus-type = <0>;
               };
           };
       };

       tx_dma: dma@a0011000 {
           compatible = "adi,axi-dmac-1.00.a";
           /* GT reg = <0xa0011000 0x10000>;*/
           reg = <0x0 0xa0011000 0x0 0x1000>;
           #dma-cells = <1>;
           #clock-cells = <0>;
           interrupts = <0 108 0>;
           /* GT clocks = <&clk 73>;*/
           clocks = <&clk 72>;

           adi,channels {
               #size-cells = <0>;
               #address-cells = <1>;

               dma-channel@0 {
                   reg = <0>;
                   adi,source-bus-width = <128>;
                   adi,source-bus-type = <0>;
                   adi,destination-bus-width = <128>;
                   adi,destination-bus-type = <2>;
               };
           };
       };

       axi_adrv9009_core_rx: axi-adrv9009-rx-hpc@a00c0000 {
           compatible = "adi,axi-adrv9009-rx-1.0";
           /* GT reg = <0xa00c0000 0x8000>;*/
           reg = <0x0 0xa00c0000 0x0 0x8000>;
           dmas = <&rx_dma 0>;
           dma-names = "rx";
           spibus-connected = <&trx0_adrv9009>;
       };

       axi_adrv9009_core_rx_obs: axi-adrv9009-rx-obs-hpc@a00c8000 {
           compatible = "adi,axi-adrv9009-obs-1.0";
           /* GT reg = <0xa00c8000 0x1000>;*/
           reg = <0x0 0xa00c8000 0x0 0x1000>;
           dmas = <&rx_obs_dma 0>;
           dma-names = "rx";
           clocks = <&trx0_adrv9009 1>;
           clock-names = "sampl_clk";
       };

       axi_adrv9009_core_tx: axi-adrv9009-tx-hpc@a00c4000 {
           compatible = "adi,axi-adrv9009-tx-1.0";
           /* GT reg = <0xa00c4000 0x4000>;*/
           reg = <0x0 0xa00c4000 0x0 0x4000>;
           dmas = <&tx_dma 0>;
           dma-names = "tx";
           clocks = <&trx0_adrv9009 2>;
           clock-names = "sampl_clk";
           spibus-connected = <&trx0_adrv9009>;
           //adi,axi-pl-fifo-enable;

           /* GT */
           plddrbypass-gpios = <&gpio 138 0>;
       };

       axi_adrv9009_rx_jesd: axi_jesd204_rx@a0014000 {
           compatible = "adi,axi-jesd204-rx-1.0";
           /* GT reg = <0xa0014000 0x1000>;*/
           reg = <0x0 0xa0014000 0x0 0x4000>;

           interrupts = <0 106 0>;

           clocks = <&clk 71>, <&axi_rx_clkgen>, <&axi_adrv9009_adxcvr_rx 0>;
           clock-names = "s_axi_aclk", "device_clk", "lane_clk";

           #clock-cells = <0>;
           clock-output-names = "jesd_rx_lane_clk";

           adi,octets-per-frame = <4>;
           adi,frames-per-multiframe = <32>;
       };

       axi_adrv9009_tx_jesd: axi_jesd204_tx@a001c000 {
           compatible = "adi,axi-jesd204-tx-1.0";
           /* GT reg = <0xa001c000 0x1000>;*/
           reg = <0x0 0xa001c000 0x0 0x4000>;

           interrupts = <0 105 0>;

           clocks = <&clk 71>, <&axi_tx_clkgen>, <&axi_adrv9009_adxcvr_tx 0>;
           clock-names = "s_axi_aclk", "device_clk", "lane_clk";

           #clock-cells = <0>;
           clock-output-names = "jesd_tx_lane_clk";

           adi,octets-per-frame = <2>;
           adi,frames-per-multiframe = <32>;
           adi,converter-resolution = <14>;
           adi,bits-per-sample = <16>;
           adi,converters-per-device = <4>;
           adi,control-bits-per-sample = <2>;
       };

       axi_adrv9009_rx_os_jesd: axi_jesd204_rx@a0018000 {
           compatible = "adi,axi-jesd204-rx-1.0";
           /* GT reg = <0xa0018000 0x1000>;*/
           reg = <0x0 0xa0018000 0x0 0x4000>;

           interrupts = <0 104 0>;

           clocks = <&clk 71>, <&axi_rx_os_clkgen>, <&axi_adrv9009_adxcvr_rx_os 0>;
           clock-names = "s_axi_aclk", "device_clk", "lane_clk";

           #clock-cells = <0>;
           clock-output-names = "jesd_rx_os_lane_clk";

           adi,octets-per-frame = <4>;
           adi,frames-per-multiframe = <32>;
       };

       axi_tx_clkgen: axi_clkgen@a00a0000 {
           compatible = "adi,axi-clkgen-2.00.a";
           /* GT reg = <0xa00a0000 0x10000>;*/
           reg = <0x0 0xa00a0000 0x0 0x10000>;
           #clock-cells = <0>;
           clocks = <&clk0_ad9528 1>;
           /* MB clocks = <&hmc7044 0>;*/
           clock-output-names = "axi_tx_clkgen";
       };

       axi_rx_clkgen: axi_clkgen@a0020000 {
           compatible = "adi,axi-clkgen-2.00.a";
           /* GT reg = <0xa0020000 0x10000>;*/
           reg = <0x0 0xa0020000 0x0 0x10000>;
           #clock-cells = <0>;
           clocks = <&clk0_ad9528 1>;
           /* MB clocks = <&hmc7044 0>; */
           clock-output-names = "axi_rx_clkgen";
       };

       axi_rx_os_clkgen: axi_clkgen@a0030000 {
           compatible = "adi,axi-clkgen-2.00.a";
           /* GT reg = <0xa0030000 0x10000>;*/
           reg = <0x0 0xa0030000 0x0 0x10000>;
           #clock-cells = <0>;
           clocks = <&clk0_ad9528 1>;
           /* MB clocks = <&hmc7044 0>;*/
           clock-output-names = "axi_rx_os_clkgen";
       };

       axi_adrv9009_adxcvr_rx: axi_adxcvr@a0090000 {
           #address-cells = <1>;
           #size-cells = <0>;
           compatible = "adi,axi-adxcvr-1.0";
           /* GT reg = <0xa0090000 0x1000>;*/
           reg = <0x0 0xa0090000 0x0 0x10000>;

           clocks = <&clk0_ad9528 1>, <&axi_rx_clkgen 0>;
           clock-names = "conv", "div40";
           /* MB clocks = <&hmc7044 0>, <&axi_rx_clkgen 0>;
           clock-names = "conv", "div40"; */

           #clock-cells = <1>;
           clock-output-names = "rx_gt_clk", "rx_out_clk";

           adi,sys-clk-select = <0>;
           adi,out-clk-select = <3>;
           adi,use-lpm-enable;
           adi,use-cpll-enable;
       };

       axi_adrv9009_adxcvr_rx_os: axi_adxcvr@a0080000 {
           #address-cells = <1>;
           #size-cells = <0>;
           compatible = "adi,axi-adxcvr-1.0";
           /* GT reg = <0xa0080000 0x1000>;*/
           reg = <0x0 0xa0080000 0x0 0x10000>;

           clocks = <&clk0_ad9528 1>, <&axi_rx_os_clkgen>;
           clock-names = "conv", "div40";
           /* MB clocks = <&hmc7044 0>, <&axi_rx_os_clkgen>;
           clock-names = "conv", "div40"; */

           #clock-cells = <1>;
           clock-output-names = "rx_os_gt_clk", "rx_os_out_clk";

           adi,sys-clk-select = <0>;
           adi,out-clk-select = <3>;
           adi,use-lpm-enable;
           adi,use-cpll-enable;
       };

       axi_adrv9009_adxcvr_tx: axi_adxcvr@a00b0000 {
           #address-cells = <1>;
           #size-cells = <0>;
           compatible = "adi,axi-adxcvr-1.0";
           /* GT reg = <0xa00b0000 0x1000>; */
           reg = <0x0 0xa00b0000 0x0 0x10000>;

           clocks = <&clk0_ad9528 1>, <&axi_tx_clkgen>;
           clock-names = "conv", "div40";
           /* MB clocks = <&hmc7044 0>, <&axi_tx_clkgen>;
           clock-names = "conv", "div40"; */

           #clock-cells = <1>;
           clock-output-names = "tx_gt_clk", "tx_out_clk";

           adi,sys-clk-select = <3>;
           adi,out-clk-select = <3>;
       };

       axi_ddc_controller@a0001000 {
           compatible = "generic-uio";
           status = "okay";
       };

       axi_fabric_bridge@a0004000 {
           compatible = "generic-uio";
           status = "okay";
       };

       axi_fabric_bridge@a0008000 {
           compatible = "generic-uio";
           status = "okay";
       };

       axi_register@a0000000 {
           compatible = "generic-uio";
           status = "okay";
       };

       axi_sdram_manager@a0040000 {
           compatible = "generic-uio";
           status = "okay";
       };

       axi_sdram_manager_control@a000c000 {
           compatible = "generic-uio";
           status = "okay";
       };

       axi_to_fabric_fifo@a0002000 {
           compatible = "generic-uio";
           status = "okay";
       };

       axi_to_fabric_fifo@a000d000 {
           compatible = "generic-uio";
           status = "okay";
       };

       fabric_to_axi_fifo@a0003000 {
           compatible = "generic-uio";
           status = "okay";
       };

       fabric_to_axi_fifo@a000e000 {
           compatible = "generic-uio";
           status = "okay";
       };

       AxiPPSCounterCoarse@b0002000 {
           status = "disabled";
       };

       AxiPPSCounterFine@b0003000 {
           status = "disabled";
       };

       TimestampManager@b0004000 {
           status = "disabled";
       };

       axi_mdio@b0005000 {
           status = "disabled";
       };

       axi_register@b0006000 {
           status = "disabled";
       };

       axi_to_fabric_fifo@b0000000 {
           status = "disabled";
       };

       serial@b0007000 {
           status = "disabled";
       };

       serial@b0008000 {
           status = "disabled";
       };

       fabric_to_axi_fifo@b0001000 {
           status = "disabled";
       };

       system_management_wiz@b000c000 {
           status = "disabled";
       };

       axi_hsuart@80002000 {
           status = "disabled";
       };

       axi_hsuart@80003000 {
           status = "disabled";
       };

       axi_hsuart@80004000 {
           status = "disabled";
       };

       axi_hsuart@80005000 {
           status = "disabled";
       };

       axi_register@80006000 {
           status = "disabled";
       };

       axi_to_fabric_fifo@80000000 {
           status = "disabled";
       };

       fabric_to_axi_fifo@80001000 {
           status = "disabled";
       };

       spi_master@80007000 {
           status = "disabled";
       };

   };

   reserved-memory {
       #address-cells = <2>;
       #size-cells = <2>;
       ranges;
       rproc_0_reserved: rproc@7fc00000 {
           no-map;
           reg = <0x0 0x7fc00000 0x0 0x400000>;
       };
   };

   power-domains {
       pd_r5_0: pd_r5_0 {
           #power-domain-cells = <0x0>;
           pd-id = <0x7>;
       };
       pd_r5_1: pd_r5_1 {
           #power-domain-cells = <0x0>;
           pd-id = <0x8>;
       };
       pd_tcm_0_a: pd_tcm_0_a {
           #power-domain-cells = <0x0>;
           pd-id = <0xf>;
       };
       pd_tcm_0_b: pd_tcm_0_b {
           #power-domain-cells = <0x0>;
           pd-id = <0x10>;
       };
       pd_tcm_1_a: pd_tcm_1_a {
           #power-domain-cells = <0x0>;
           pd-id = <0x11>;
       };
       pd_tcm_1_b: pd_tcm_1_b {
           #power-domain-cells = <0x0>;
           pd-id = <0x12>;
       };
       pd_ocm_0: pd_ocm_0 {
           #power-domain-cells = <0x0>;
           pd-id = <0x13>;
       };
   };

   chosen {
       bootargs = "earlycon clk_ignore_unused cpuidle.off=1 uio_pdrv_genirq.of_id=\"generic-uio\"";
   };
};
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0 DragosB

on Jul 15, 2020 3:50 PM in reply to gavint
Hi,

These are the two drivers you are searching for:
- https://github.com/analogdevicesinc/linux/blob/master/drivers/iio/adc/cf_axi_adc_core.c
- https://github.com/analogdevicesinc/linux/blob/master/drivers/iio/frequency/cf_axi_dds.c

Dragos
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0 gavint
on Jul 17, 2020 2:51 AM in reply to DragosB
Hello Dragos

Thank you for responding.

I added printouts to these device drivers to track down where they are failing. They are both getting to the following function:

iio_dmaengine_buffer_alloc in industrialio_buffer_dmaengine.c

This function is failing because dma_request_slave_channel_reason is returning EPROBE_DEFER.

I can't figure out why this is the case.

Please can you offer some advice?

Thank you.
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0 DragosB

on Jul 19, 2020 6:37 PM in reply to gavint
It looks like you have changed the DMA clocks. Can you explain?

Dragos
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0 gavint
on Jul 23, 2020 3:41 AM in reply to DragosB
Hello Dragos

The ZCU102 reference design was using a 333MHz PLL/MMCM clock wizard generated clock to clock the DMA components (PL clock 0 is 100MHz and is the reference clock input to the 333MHz PLL/MMCM) . I am not sure how this clock is labeled as clk73 in the device tree. I copied this from the ADI reference design.

In the custom platform, I need to save on PLL/MMCM clock resources and so I have used PL clock 1 to clock the DMA components (PL clock 1 is 300MHz and PL clock 0 (AXI clock) is 150MHz).

I believe that PL clock 1 is clk72 in the device tree and that PL clock 0 is clk71. Is this correct?

Are there any requirements on the clock for the DMA components in terms of frequency or how the clock must be generated?

Thank you again.
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0 gavint
on Aug 11, 2020 10:54 AM in reply to DragosB
I have checked using an oscilloscope that the clocks to the DMA components are correct and that the DMA components are not being held in reset.

What are the reasons for "iio_dmaengine_buffer_alloc" in industrialio_buffer_dmaengine.c returning EPROBE_DEFER?

Please help, I am stuck and the project has stalled as a result.

Thank you.
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0 ADIApproved

on Aug 12, 2020 5:02 AM in reply to gavint
EPROBE_DEFER usually happens if a resource is not yet initialized when a driver probes.

So, for example an IIO driver initializes, checks that the DMA component is initialized, it finds that it isn't, it should return -EPROBE_DEFER to call for a retry later.

Sometimes, a bad configuration can cause an infinite EPROBE_DEFER loop. Usually when the driver isn't being built, or the device-tree configuration isn't good.
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0 gavint
on Aug 28, 2020 5:11 AM in reply to ADIApproved
I would like to thank the following post:

https://ez.analog.com/linux-software-drivers/f/q-a/108223/cf_axi_adc-driver-is-failing-during-ring-buffer-creation/320788#320788

The symptoms described matched mine exactly. This put me on the right track and I discovered that I was missing an interrupt-parent for the ADRV9009 DMA components. The interrupt-parent was being set by the hierarchy of DTS files in the ZCU102 project but when I created a new device tree for my custom board, I missed this.
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ADRV9009 does not enumerate axi-adrv9009-tx-hpc and axi-adrv9009-rx-hpc during boot