ZCU102+AD9631 Linux image missing support for Neon, low CPU speed

are you sure that what you are seeing isn't actually the Linux scheduler clocking down the CPU if it's idle?

How can I check it ? But even during boot there is message about low clock scheduler.

so this looks more like something to resolve with Xilinx than with us;

it looks like something that they should know

we don't touch their base platforms too much;

and i'm pretty sure this isn't something we touched;

I am discussing with them as well. But cpuinfo data comes from your distribution of Linaro, correct ?

I am discussing with them as well. But cpuinfo data comes from your distribution of Linaro, correct ?

it comes from our kernel, but we don't touch most of the cpuinfo that Xilinx puts there;

we probably have a single patch on top of Zynq [not ZynqMP that is ZCU102]

our kernel is basically Xilinx's kernel + ~850 patches which are  mostly for our ADCs/DACs

the easiest way to see this is branch:

https://github.com/analogdevicesinc/linux/tree/adi-4.19.0

it's a rebased version of our master; it contains upstream Linux 4.19.0 patches + Xilinx patches + our converter patches;

our rebased branch comes from this tag

github.com/.../xlnx_rebase_v4.19_2019.2

so if you do "git log xlnx_rebase_v4.19_2019.2..adi-4.19.0"

the defconfigs we use are pretty much the same as Xilinx's

now back to the Linaro distro we use: I admit that is a pretty old distro and was picked up from Linaro a while back;

but even so, anything in there is 3rd party and we don't maintain

so, this is not the best forum to get an answer for this question;

maybe another question is: are you seeing some low performance?

Yes, I see low performance and it might be ZCU102 connected. I have some issues in bare-metal as well which is surprising. Still I can't find explanation between cpuinfo and sched_clock on both systems. According to this link https://www.kernel.org/doc/html/latest/timers/timekeeping.html sched_clock should be fast and it is slow at 100Mhz.

Well, if you run just a pure Xilinx kernel on the ZCU102, do you still see the issue?

I wonder if it 's a HDL issue; that one is out of my scope of understanding [i.e. how FPGA interconnects with CPU to give this result].

But in any case, I would first rule out Xilinx as the problem.

FWIW: I don't have a ZCU102 around [with the isolation period], so I can't test.