I am using the following configuration:
I updated my kernel to:Talise API version: 188.8.131.52, with following new features:
I made a build of the latest software version for libiio, iiod, iio-oscilloscope on march 11.
When I use board1 to transmit a signal, and the board2 to receive. Each new boot with one of the EVM boards there is a different phase offset between Tx board1 and Rx board2.
The questions I have :
1. Can you transmit from Tx1 of both boards and measure the phase difference using network analyzer as mentioned in the user guide?
2. It is tested with an old package. New API added an enhancement feature for RF LO Sync.
From the release notes:
Could someone explain me how it is possible that previous version (UG1295) already contains RF LO Sync, when it is clear in the release notes (API 184.108.40.206) that this wasn't working in older versions...
In the older version, there was a bug which prevented MCS functionality for a few RF frequencies which uses fractional PLL. In the latest version that is corrected.
Can you check if all the clocks(SYSREF and REFCLK) are aligned at the FPGA input?
Have you tried configuring the clocks as mentioned in the below post:
I have measured with an oscilloscope. And the rising edge are alligned (measurment accuracy 200ps). Measure points:
Configuration of the PLL on the Evaluation board AD9528 :