Hello Sir/ madam,
I am working on using AD9364in S-Band transceiver project , For validation purpose i am using AD9364 Evaluation board. Complete programmingfhgg of the AD9364 on our controller is done. Step by step validation with the Evaluation board also completed. But, I am facing problem with ENSM control which I'm controlling it thru SPI. After ad9361_setup() is complted I am forcing ENSM to FDD mode by setting force tx on 1. It should switch to FDD mode after that. but, while setting TX sampling frequency, if I read the state it was in Alert mode. Before putting it into ALERT mode. What's the issue? Communication with AD9364 is proper, but why it is not going to FDD mode?
I am generating data clock to modem of 20 MHz successfully, and also Sampling clock is also set properly. I am not being able to observe the LO frequency at the O/P, What might be the issue?
Thanks & regards,
Branched into a new discussion and moved to No-OS drivers.
You should use the API functions or Pin Control to control the ENSM state machine.
ad9361_set_en_state_machine_mode() see here:
Thanks for the reply, I have solved the issue I quoted above. It was issues with Locking of TX_PLL, RX_PLL Clocks. Some configurations were missing, using latest drivers I modified the code on application controller framework. But, I have few more doubts pertaining to AD9364 Post configuration,
As I said earlier, I am using AD9364 and Custom ASIC for my application, configuration of AD9364 is done and I am able to see the LO leakage on Tx side. I have set TX LO to 2.4GHz and RX LO to 2.0GHz. Design includes AD9364 interfaced to ASIC through Level translator in CMOS mode. TX_FRAME and RX_FRAME clocks for samplling is getting generated. My queries are,
You already opened a thread about this issue: The specified item was not found.
Please don't do this anymore.