We are trying to transmit a signal using the AD9361's full 56 MHz bandwidth. We are using the libiio/py-adi library for configuring the device, and we set the following field in both the C and Python versions of the code: txcfg.bw_hz = MHZ(56). However, when we measure the output of the transmitted signal using a spectrum analyzer, we observe a spectrum of 2 MHz. Should we be increasing the sample rate of the DAC to 56 MHz as well?
Moved to Linux subforum.
TX is limited to 40 MHz of analog bandwidth. You can design an FIR to move this slightly wider. You need to use this tool: https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms2-ebz/software/filters?s=ad9361&s=filter
Changing the TX bandwidth changes the analog filter bandwidth, not the sample rate. These two are independent. If you use filter files created with the above tool it will update both for you.
Just to clarify, is the sample rate of the DAC setting the TX bandwidth, for which a filter needs to be designed?
Sample rate and custom FIRs are strictly tied together since the FIR has a specific interpolation settings (1,2,4). So setting the FIR will allow certain DAC rates. It might be better to use the term TX sample rate since the DAC actually runs much faster.
The property sample rate in pyadi-iio for the AD936x base devices is actually the rate at the digital interface of the chip for both RX and TX. The actual bandwidth will be some fraction of this, based on how the RX and TX bandwidths are set. Samples from the ADC are decimated down to this rate, and interpolated up to the DAC rate. ADC and DAC rates are not explicitly exposes in pyadi-iio, but I would just ignore them and set the sample rate.
When you use the Filter Designer tool it takes into account the limitations of the AD9361 and will set the FIR, clock rates, and analog filter bandwidth for you.
Thank you Travis, that clears up a lot of our confusions.