Updating socfpga_arria10_socdk_adrv9371.dtb


I am working with an A10 SOC board and the ADRV9371 evaluation board. I changed the oscillator on board the ADRV9371 to have a VCXO = 100MHz so that I may derive a 120MHz device clock. I updated the adi-adrv9371.dtsi file to reflect the new PLL2, PLL1, VCXO, and VCO settings that are required with the new VCXO. I used make to generate the new device tree blob as instructed in the wiki and tried to boot the A10 board. However, it appears that the 9371 driver fails with the following messages: 

[ 1.081652] dw_mmc ff808000.dwmmc0: 1 slots initialized
[ 1.087215] ledtrig-cpu: registered to indicate activity on CPUs
[ 1.093421] usbcore: registered new interface driver usbhid
[ 1.098969] usbhid: USB HID core driver
[ 1.103227] ad9371 spi32766.1: ad9371_probe : enter
[ 1.108733] spi32766.0 supply vcc not found, using dummy regulator
[ 1.130581] ad9528 spi32766.0: Feedback calibration divider value (18) out of range
[ 1.138308] ad9528: probe of spi32766.0 failed with error -22
[ 1.145902] fpga_manager fpga0: SoCFPGA Arria10 FPGA Manager registered

Could you please help me to identify what this message means in terms of the 9528 PLL settings that need to be updated? 

Thanks very much!