ad9361 devicetree

Hi, 

I'm trying to get a custom FMCOMMS3 like daughterboard to work with a ZynqMP.

Our Vivado project was updated to include all the IP cores from the ZCU102 + FMCOMMS2 project (here)

Most of the project seems to be working, the AD9361 spi node, the DMAs and the cf-ad9361-dds-core-lpc are probed with no apparent error but Linux fails to initialize the cf-ad9361-lpc core.

here is a sample of our bootlog showing the error: 

[root@zynqmp ~]$ dmesg | grep -i ad9361                                                                                                                 
[    1.708884] ad9361 spi2.0: ad9361_probe : enter (ad9361)                                                                                                   
[    1.934319] ad9361 spi2.0: ad9361_probe : AD936x Rev 2 successfully initialized                                                                            
[    1.958005] cf_axi_dds 80004000.cf-ad9361-dds-core-lpc: Analog Devices CF_AXI_DDS_DDS MASTER (9.00.b) at 0x80004000 mapped to 0xffffff8008ff5000, probed DDS
 AD9361                                                                                                                                                       
[    2.479485] ad9361 spi2.0: Failed to set BB ref clock rate (-22)                                                                                           
[    3.428878] ad9361 spi2.0: Calibration TIMEOUT (0x5E, 0x80)                                                                                                
[    3.455354] ad9361 spi2.0: Failed to set BB ref clock rate (-22)                                                                                           
[    3.607736] ad9361 spi2.0: ad9361_dig_tune_delay: Tuning RX FAILED!                                                                                        
[    3.614246] cf_axi_adc: probe of 80000000.cf-ad9361-lpc failed with error -5                                                                               

here is a section of our devicetree based on this file.

cf_ad9361_adc_core_0: cf-ad9361-lpc@80000000 {         
        compatible = "adi,axi-ad9361-6.00.a";          
        reg = < 0x00 0x80000000 0x00 0x6000 >;         
        dmas = <&rx_dma 0>;                            
        dma-names = "rx";                              
        spibus-connected = <&adc0_ad9361>;             
};                                                     
                                                       
cf_ad9361_dac_core_0: cf-ad9361-dds-core-lpc@80004000 {
        compatible = "adi,axi-ad9361-dds-6.00.a";      
        reg = < 0x00 0x80004000 0x00 0x1000 >;         
        clocks = <&adc0_ad9361 13>;                    
        clock-names = "sampl_clk";                     
        dmas = <&tx_dma 0>;                            
        dma-names = "tx";                              
};                                                     

the base address of the axi_ad9361 core is 0x80000000.

I couldn't find information on how to deduce the reg parameters for these two nodes. Am I missing something in the dts?

Where is this BB ref clock setup, is it a parameter in Vivado? 

Thanks for your help, 

Liam 

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