ADV7280M PetaLinux Driver


I want to use ADV7280M as the analog frontend in my design and have trouble getting video data in to the Zynq Ultrascale module. My device tree is as follows;

            adv7280@20 {
                compatible = "adi,adv7281-ma";
                reg = <0x20>;
                port {
                    adv7280_out: endpoint {
                        remote-endpoint = <&csiss_in>;

and my V4L pipeline is;

root@zcu106_vcu_trd:~# xmedia-ctl -p
Media controller API version 4.19.0

Media device information
driver          xilinx-video
model           Xilinx Video Composite Device
bus info        
hw revision     0x0
driver version  4.19.0

Device topology
- entity 1: vcap_mipi output 0 (1 pad, 1 link)
            type Node subtype V4L flags 0
            device node name /dev/video0
    pad0: Sink
        <- "a0000000.mipi_csi2_rx_subsystem":0 [ENABLED]

- entity 5: adv7180 15-0020 (1 pad, 1 link)
            type V4L2 subdev subtype Decoder flags 0
            device node name /dev/v4l-subdev0
    pad0: Source
        [fmt:UYVY8_2X8/720x240@1001/30000 field:alternate colorspace:smpte170m]
        -> "a0000000.mipi_csi2_rx_subsystem":1 [ENABLED]

- entity 7: a0000000.mipi_csi2_rx_subsystem (2 pads, 2 links)
            type V4L2 subdev subtype Unknown flags 0
            device node name /dev/v4l-subdev1
    pad0: Source
        [fmt:SRGGB8_1X8/720x240 field:none colorspace:srgb]
        -> "vcap_mipi output 0":0 [ENABLED]
    pad1: Sink
        [fmt:SRGGB8_1X8/720x240 field:none colorspace:srgb]
        <- "adv7180 15-0020":0 [ENABLED]

The documentation is REALLY lacking. How do I even set the analog input port? v4l-ctl util doesn't support the S_ROUTING api the driver exposes, which I found out inspecting the source code of the driver in repo. Can deinterlacing be enabled through the linux driver?

What I want to do eventually is, get this video encoded with the VCU this Zynq MPSoC has.