Truth table in datasheet claims that when Vdd and Viso is unpowered, inputs are
X, and outputs are Z. I am experiencing that the isolated input and output
sinks about 130uA in this state, which is causing me some trouble. When the
device is powered, however, the input leakage is practically zero. I am using
the internal converter by supplying 5V at Vdd.
Is this normal behavior? I have four devices pr. board, and they all act the
I have attached a schematic to show how it is used. It controls the gate of an
open drain mosfet switch. (The two 0 Ohm resistors are just for testing
This circuit may operate in normally closed mode. In that case a voltage
(100-150V) is applied to X17 pin 3. ADuM detects this and pin 2 goes high, and
the ADuM can still control the gate by overriding the voltage contribution from
the applied voltage at X17 pin 3. This works well.
The problem occurs when power to the board is lost. The gate should have been
held high by the applied voltage but the current leakage into pin 6 (VOb)
prevents this. According to the data sheet all outputs should enter high
impedance state when Vdd and VIso are unpowered.
I think you are right that it is parasitically powered through pin 7 (VIa), but
I was confused by the voltages at pin 6 and 7 wich in this state were around
2,6V. Does this make sense?
I guess I could increase the value of R803 quite a lot and maybe solve the
The digital isolator input has an internal ESD protection diode with anode at
the input and cathode connects to VDD which can parasitically power the device
and consume some power.
If VIA = 2.6V, and the zener diode V801 clamps at 5.1V when 100 – 150V is at
X17-3, then the current through R803 = (5.1V- 2.6V)/1K = 2.5mA. This would
parasitically power side 2.
Increasing R803 value should reduce the current into VIA and decrease the
parasitic powering of the ADuM5241.