How can you solve emission problems resulting from layout issues on the ADuM5020 PCB?

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Question: How can you solve emission problems resulting from layout issues on the ADuM5020 PCB? Answer: 1) Use a discrete capacitor between the two grounds for frequencies up to 200MHz. A more effective way to reduce emissions would be to use capacitance built into the PCB (stitching capacitance). Note that the area of copper GND planes which are forming capacitor plates would not want to be reduced. If you chose the discrete capacitor, it first needs to meet the isolation/safety requirements for the isolation barrier which probably means something like an X or Y cap as well as having a suitable voltage rating. Next, the capacitor’s self-resonant frequency should be as high as possible. As above the self-resonant frequency, the capacitor actually behaves more like an inductor. Given the dimensions needed for a HV capacitor, they typically have a lower SRF. This is where the PCB stitching capacitor helps because it has very low ESL and so it has a high S RF. 2) It’s also beneficial to reduce the size of the isolated side’s layout since that will reduce the dipole arm size. 3) Ferrite beads: a)The size of ferrite beads should be 0603. b)Make sure the surface-mount ferrite beads are placed in series with the VISO and GNDISO pins. c)Make sure impedance of the ferrite bead is 1.8kOhms between 100MHz and 1Ghz. d)E nsure that VISO is connected first through the ferrite before the VISO load e)Make sure you do not bypass the ferrite beads Everything connected to VISO and GNDISO should go through the ferrite beads filter. e)The ground plane should be spaced away from pins 9 and 16 of the Adum5020 f)Using BLM15HE152SN1 ferrite beads may also provide a slight improvement g)Make sure there's a keep out area around ferrites. If there is ground on bottom layer under ferrites, it should be removed. 4) Make sure the decoupling bypass capacitors are placed as close to the pins as possible. The smaller 0.1uF cap should be placed less than 2mm away from the pins 5) Using Via in pads. It is a useful way of reducing emissions since it allows you to minimize the use of components and reduces space between elements while minimizing inductance. Additional guidelines are given in AN-0971: Recommendations for Control of Radiated Emissions with isoPower Devices | Analog Devices and also page 3 of the Adum5020 evkit- EVAL-ADuM5020EBZ (Rev. 0) (analog.com)