The table on pg. 22 in the MAX14931 datasheet may seem to imply that the outputs are only defined for ENA == ENB. (E.g. Both ENA=1 ∩ ENB=1). This makes it unclear what state (Hi-Z or Default) the outputs will assume in cases where ENA ≠ ENB. This is important, for example, in cases where one side is disconnected entirely, and the other side's output state must be guaranteed.
However, ENA maps to side A outputs, and ENB maps to side B outputs — both independently. For example, while side A is in an undervoltage condition (which is any supply level below the UVLO threshold, including 0V), the outputs VOUT_A and VOUT_B will be in "Default" or "Hi-Z" state depending on the state of the EN_ pin on their respective sides. VOUT_A will follow Default or Hi-Z depending solely on the logic level of ENA; the same is true for VOUT_B with respect to ENB.
| Vin | VDDA | VDDB | ENA | ENB | Vout_A | Vout_B |
| X | UVLO | Powered | 0 | 1 | Hi-Z | Default |
| X | UVLO | Powered | 1 | 0 | Default | Hi-Z |
The same logic holds for any other combination of VDD_ powered/undervoltage: each EN_ pin controls only the output pins on its same side. Therefore, although the datasheet table only shows rows where ENA=ENB=(0 or 1), the output states corresponding to all combinations of ENA & ENB are, in fact, specified.