You say the SPI interface is 3, 4, or 5 wires in the MAX3420E. What does this mean?

The minimum SPI interface consists of three wires: SS# (Slave Select), SCLK (Serial Clock), and MISO (configured for bidirectional MISO/MOSI data). Since this interface does not use the INT pin, the controlling microprocessor would need to poll two interrupt-request registers to determine when the MAX3420E requires service. By setting a control bit (FDUPSPI, full-duplex SPI), the MOSI and MISO data appear on separate pins, providing a 4-wire interface. Finally, an INT (interrupt out) pin can be connected to a processor's interrupt system.