How do I program a BULK OUT transfer in the MAX3420E?

When the host sends OUT data, the MAX3420E stores the bytes in an OUT endpoint FIFO. After the transfer is complete and verified to be error-free, the MAX3420E asserts a "DAV" (Data Available) interrupt request bit for the particular endpoint. This alerts the SPI controller to read the FIFO bytes. The SPI controller first reads an OUT FIFO byte-count register to determine how many bytes in the 64-byte FIFO are valid. It then reads that number of bytes by repeated reads to the OUTFIFO register. Finally, the SPI controller clears the OUT DAV IRQ bit (by writing 1 to it) to "re-arm" the endpoint for another OUT transfer.