How do I know when to load an IN FIFO for the MAX3420E?

The MAX3420E provides interrupt request bits for the IN endpoints called IN3BAVIRQ, IN2BAVIRQ, and IN0BAVIRQ, where "BAV" indicates "Buffer Available." The MAX3420E logic sets an IN endpoint BAVIRQ bit after a device reset, or when IN FIFO data has been successfully transferred and acknowledged by the host. At power-on, the BAVIRQ bits are set to indicate that the IN FIFOS are initially available for loading. These are the only register bits that are set to 1 by a reset—all the rest are set to 0.