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Gigabit Multimedia Serial Link (GMSL) Library
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Gigabit Multimedia Serial Link (GMSL) Library
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GMSL1

GMSL1 PHY

FAQs
  • FAQ

    Can a single hardware design support both GMSL1 and GMSL2 operation?

    A single design can meet requirements for both GMSL1 and GMSL2 operation if some very simple rules are followed: The system must meet the GMSL1 or GMSL2 channel specification. The GMSL link AC-coupling…
  • FAQ

    Can GMSL1 backward compatible devices support HDCP?

    Yes, GMSL2 devices supporting HDCP and GMSL1 backward compatibility can support HDCP. However, GMSL2 style "auto-HDCP" or "HDCP" is not support in GMSL1 mode. In the case of GMSL1 mode, all HDCP authentication…
  • FAQ

    Do GMSL1 backward compatible deserializers support AEQ?

    Yes, GMSL1 backward compatible GMSL2 deserializers support AEQ functionality as introduced in the MAX96706 family. This function is enabled by default on GMSL1 backward compatible GMSL2 devices.
  • FAQ

    How do I measure/decode the serial data (GMSL1)?

    GMSL1 has both forward and reverse data. A customer would need to use high impedance probes and use filtering to take out only the forward or reverse data. As GMSL is a proprietary link, there is not much…
  • FAQ

    I am using a GMSL2 part in GMSL1 mode. which channel spec should I use?

    Customers should follow the GMSL specification according to whichever mode is being used. thus a part working in GMSL1 mode should follow the GMSL1 specs. However, to reduce the amount of redesign, it…
  • FAQ

    In GMSL1 mode, why is the AEQ set to the maximum boost?

    There are 2 reasons. For GMSL2 parts in GMSL1 mode, the GMSL1 AEQ is tuned such that the maximum gain occurs at the maximum frequency e.g., 3.125Gbps. When using a lower PCLK frequency (e.g. the 1Gbps…
  • FAQ

    What is the difference of Base Mode and Bypass Mode in GMSL1 devices using UART?

    In Base Mode the UART Interface can access the registers of both the Serializer and Deserializer from either side of the link using the GMSL UART protocol. If a user-specific UART protocol is used, the…
  • FAQ

    What needs to be done to enable GMSL1 control channel communication?

    In forward direction: I2CSEL, BWS, HIBW, DRS, PXL_CRC settings have to match on both sides. Apply a pixel clock to Serializer and set SEREN=1 or if no pixel clock is available set SEREN=0 and CLINKEN=1…
  • FAQ

    Which GMSL serializers can support concurrent GMSL1 and GMSL2 operation when two links are active?

    A limited number of GMSL serializers can support simultaneous GMSL1 + GMSL2 operation in situations where two links are active. Not all GMSL1 backward compatible GMSL2 serializers have this capability…
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