Features

The watermark changes every frame and thus works on static images.

The RoR mode does not affect the EMI/EMC radiated emissions or conducted emissions results. Clock information is embedded in data packets from the deserializer to the serializer. Since the packets are…

Yes. When the video PRBS test is enabled, the video packets in the serializer are replaced with PRBS data.

Per the MIPI standards, Bytes on D-PHY lanes are distributed in order, starting with the lowest numbered lane; that is, byte 0 is transmitted on lane 1, byte 1 is transmitted on lane 2, and so on.

Watermarking feature is supported in certain camera SerDes but only with RGB888 datatype. Refer to device-specific data sheet and user guide for more details.

The reference clock is most commonly generated by connecting a 25MHz crystal to the crystal oscillator pins of the GMSL device An external device, such as another GMSL device or TCXO, can alternatively…

An ECC can correct any single bit error and any two-bit error. A CRC can only detect bit errors. It can't correct them.

Extended VCs concatenate two bits from the DI (Data Identifier) byte and two bits from the VCX+ECC byte are concatenated to form the virtual channel number (DPHY).

The receiver recovers a clock by locking onto signal transitions on the lane. It then recovers seven five-level symbols to generate 78,125 possible codes. That's enough to decode sixteen data bits with…

A termination is applied at the receiver when it senses the HS-REQ state and is removed when it senses the STOP state.