Per the MIPI standards, Bytes on D-PHY lanes are distributed in order, starting with the lowest numbered lane; that is, byte 0 is transmitted on lane 1, byte 1 is transmitted on lane 2, and so on.
Per the MIPI standards, Bytes on D-PHY lanes are distributed in order, starting with the lowest numbered lane; that is, byte 0 is transmitted on lane 1, byte 1 is transmitted on lane 2, and so on.