ADuM1250  Rising edge


Our customer will use ADuM1250.

When he evaluates ADuM1250, input signal SCL1  is 400KHz pulse from  controller.

But,  its waveform is strange in  measurement result.

The waveform of output SCL2 shows long rising time.

(please refer to attachment)

When he   measured  the output  pulse of 400Khz from controller without ADuM1250 ,

he looked the normal waveform of 400KHz pulse .

Why is this appeared and how should we modify for avoiding this ?

VDD1:3.3V  Pull-up: 2.2Kohm

VDD2:3.3V  Pull-up:4.7Kohm

 If needed , I will send raw data of waveform and circuit design.

(Could you teach me your E-mail address because these data are customer's data ?)



  • 0
    •  Analog Employees 
    on Feb 27, 2018 11:43 AM

    Hi Terumasa,

    From the pictures it looks the side 1 may have too strong a pull up resistor. The peak on the rising edge may upset other devices on the bus. A weaker pull-up should eliminate that peak. It is normal operation that the waveform on the side 1 will have a step as the low propagates to side 2 and back.

    On side 2 the rising edge can be sped up with a stronger pull up. If the bus is heavily loaded, one of the LTC43xx bus buffers/accelerators may be useful.

    My email is available on my profile if you would like to discuss further offline.



  • Hello Jason,

    Thank you for your answer.

    I understood.

    I will close this thread.