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Understanding pulse width distortion and minimum pulse width requirement


We would like to use the ADuM262N to transmit a clock signal of 85MHz or even 100MHz. This could cause problems with the given maximum PWD of 5ns. We made some quick test and the PWD was <1ns in the temperature range that is of interest to us. Thus, my question is, under what circumstances can the PWD become >2ns or achieve the maximum 5ns?

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