Understanding pulse width distortion and minimum pulse width requirement

Hello

We would like to use the ADuM262N to transmit a clock signal of 85MHz or even 100MHz. This could cause problems with the given maximum PWD of 5ns. We made some quick test and the PWD was <1ns in the temperature range that is of interest to us. Thus, my question is, under what circumstances can the PWD become >2ns or achieve the maximum 5ns?


Best regards
Hans

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    •  Analog Employees 
    on Feb 4, 2018 7:21 PM

    Hi Hans,

    I checked with our test engineer that we collect the data at 25C and the temperature extremes(-40C and 125C), and we do not have any data on the reduced temperature range of 20C to 60C. The PWD distortion can be either a positive or negative number, so a duty cycle correction would not necessarily compensate for the PWD.

    Regards,

    Neil

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  • 0
    •  Analog Employees 
    on Feb 4, 2018 7:21 PM

    Hi Hans,

    I checked with our test engineer that we collect the data at 25C and the temperature extremes(-40C and 125C), and we do not have any data on the reduced temperature range of 20C to 60C. The PWD distortion can be either a positive or negative number, so a duty cycle correction would not necessarily compensate for the PWD.

    Regards,

    Neil

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