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The usage of ADuM3221

Hi, Everyone.

I use two  ADuM3221 to driver a Synchronous Buck(I choose ADuM3221 becuase application requests the operation temperature -55℃~+125℃), whlie each ADuM3221 is connected to one mosfet. Both ADuM3221's Pin 3 and Pin 6 are vacant. I provide a isolated +12V power source between VDD2 and GND2 to drive the high side mosfet but not a bootstrap capacitor. And the GND2 is connected to the Source of high side mosfet.

Other connection are the same as Typical Connection in the datasheet. And the gate resistor paralled with a fast swithing diode is 5R. Schematic shows below.

When the input of the Synchronous Buck Vin on, the waveforms of VGS are all fluctuating (about 1V). Waveform shows below.

Q1. If I only use one channle of ADuM3221, how deal with the unused channel?

Q2. How to solve this problem?

Hope to get prompt reply.
  • Hello,

    Your schematic looks good.

    1) For the unused channel, you can tie Pin 3 to GND1 or VDD1. You can leave Pin 6 unconnected. Pulling Pin 3 to either high or low will remove the chance that it will float near the thresholds, causing slightly higher dissipation within the IC when there is more switching. You can pull it high or low with a resistor, or without.

    2) What type of probe are you using to measure the gate voltage? It is notoriously difficult to measure the highside driver accurately, since its reference is the half-bridge switching node, which is swinging up and down at the switching frequency. I see ripple in the gate drive waveform both during the high time and the low time of the highside gate driver. This either suggests a very long trace length from gate driver IC to switch gate (through the series resistor/diode), or measurement noise caused by the differential nature of the measurement.

    Ringing on gate drive waveforms is sometimes caused by an underdamped RLC in the gate drive path. The fact that the lowside driver doesn't have this ripple suggests this isn't the case in your circuit, but the usual remedy to ringing is to add just a little more resistance in the series resistor. You could try increasing the 5 Ω resistor to maybe 7 or 9 Ω and seeing what happens. If nothing changes, the ripple is most likely measurement related.

    If you are using a different type of probe to measure highside and lowside gate waveforms, you could try putting the differential probe on the lowside, and seeing if the lowside now shows a noticeable ripple. The ripple would still be less since the ground reference isn't moving, but it could show the effect of the probe.

    There is a slight ripple on the VDD2-GND2 waveform. Any ripple on the supply will translate to ripple on the gate drive output when the output is high, but when the output is low, the ripple won't translate. The fact that we see ripple during the low output times of the highside suggest this is measurement related, and not really present on the gate of the power switch. You could try capturing the switch node voltage to GND2 of the lowside IC and see if there is a large ripple present in the measurement.


  • With ref to the above attache schematic,  how high can the Vin be on the Q1 side? 

    Can I do 270VDC = Vin  assuming the FET is rated for this? 

    What is a practical limit for the working isolation voltage (Vin bus) on the ADum3221 in such a scenario as shown in the schematic?