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Vil min and maximum input voltage requirement for A0,A1 and EN of ADG409

Thread Summary

The user inquired about the Vil and Vih min and max input voltage requirements for A0, A1, and EN of the ADG409. The support engineer clarified that the minimum logic high voltage (Vih min) is 2.4V and the maximum is Vdd, while the maximum logic low voltage (Vil max) is 0.8V and the minimum is 0V/GND. The user confirmed that their FPGA IO voh of 3.3V can directly interface with the ADG409.
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Hello,

Please share me the Vil min and maximum input voltage requirement for A0,A1 and EN of ADG409

Regards,

Prasanna G