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Are there any clamp circuits on the input pins internally in ADuM6411?

Thread Summary

The user inquires about protecting the ADuM6411 digital isolator's input pins from negative voltages, which can cause pulse distortion. The final answer confirms that the input circuit includes ESD diodes (input to cathode, anode to GND; input to anode, cathode to VDD) and advises limiting the max continuous input current to 1mA to prevent damage.
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Hi!

 

In our new project we would like to use an ADuM6411.

The task of this circuits is to convert a floating negative or positive voltage to a digital value for a FPGA with the smallest propagation delay and pulse distortion.

The positive voltage is reduced to the suitable logic level by a voltage divider.

But in case of the input pin of this digital isolator may obtain negative voltage. To prevent this, we use a schottky diode joined to this pin. But is has relatively high capacitance that causes additional pulse distortion.

The datasheet contains the absolute maximum values (Table 26.), and there is value that the input pins does not exceed +- 0,5V for the respective power supply.

Are there any clamp circuits on the input pins internally? If the input current has to be limited, it wont cause the damage the digital isolator? If yes, to what extent do you need to limit the value?

I am looking forward to your answer.

Thank you in advance.